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Add GPU project chipyard changes #2190

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103c3af
Bump rocket-gpu with vxcheck tool
hansungk Nov 29, 2023
18c5e55
Add RocketDummyVortexConfig
hansungk Dec 12, 2023
ba6c807
gitignore Vortex *.bin files in sims/
hansungk Dec 31, 2023
fdf0206
Add scripts for vortex binfile setup and sim runs
hansungk Dec 31, 2023
0bb2a5c
Accept EXTRA_SIM_PREPROC_DEFINES in run-radiance.sh
hansungk Jan 17, 2024
57cce2d
Bump rocket-gpu
hansungk Jan 17, 2024
3190224
Squelch inout coerce lint messages from vortex RTL
hansungk Jan 17, 2024
6270d2f
move radiance rom and soc configs out
richardyrh Jan 17, 2024
472a2ec
Merge branch 'graphics' of https://github.com/hansungk/chipyard into …
richardyrh Jan 17, 2024
d61d483
Add radiance to build.sbt
hansungk Jan 17, 2024
0a9291e
Add radiance submodule
hansungk Jan 17, 2024
ce570e0
Revert rocket-chip to pre-gpu changes
hansungk Jan 17, 2024
bf84580
Merge remote-tracking branch 'upstream/main' into graphics
hansungk Jan 17, 2024
4e2e04e
Fix path to WithMbusScratchpad in radiance configs
hansungk Jan 17, 2024
c9880c7
Bump radiance with upstream merge
hansungk Jan 17, 2024
5ed1f0a
add radiance submodule
richardyrh Jan 17, 2024
098b52f
revert accidental dsptools build path change
richardyrh Jan 17, 2024
0789361
i made an oopsie
richardyrh Jan 17, 2024
1cf06fc
Track changes in Radiance args.bin/op_*.bin in makefiles
hansungk Jan 17, 2024
0e078b2
Remove unnecessary make clean in run-radiance.sh
hansungk Jan 17, 2024
bcf2b8a
Bump radiance with uncoalescer fix
hansungk Jan 19, 2024
440ba48
Bump radiance
hansungk Jan 23, 2024
268a6fb
Clean up radiance configs
hansungk Jan 23, 2024
60daad8
Hardcode 32bit into bootrom name
hansungk Jan 24, 2024
886b5c5
Add RadianceGemminiConfig and bump radiance
hansungk Jan 24, 2024
7d712bc
Fix coalescer SUB_PROJECT for repo split
hansungk Jan 24, 2024
6d35905
Bump radiance
hansungk Jan 24, 2024
f0c6862
build.sbt: radiance depends on gemmini
hansungk Jan 24, 2024
bfce045
Bump gemmini to ext-spad
hansungk Jan 24, 2024
ccb6799
Bump gemmini
hansungk Jan 24, 2024
7f23219
bump gemmini
richardyrh Jan 25, 2024
43d9ebb
Run ci on graphics-ci
hansungk Jan 26, 2024
468d73a
Roll back riscv-pk to upstream/main
hansungk Jan 26, 2024
75b4284
Remove setup-repo, don't set custom REMOTE_WORK_DIR
hansungk Jan 26, 2024
bd97d95
Remove use of REMOTE_WORK_DIR
hansungk Jan 26, 2024
69b4564
Fix old path to romAddr.bin
hansungk Jan 26, 2024
24dec35
Bump rocket-chip to new gemmini-ext-spad fork
hansungk Jan 26, 2024
feece56
Bump rocket-chip to new gemmini-ext-spad fork
hansungk Jan 26, 2024
0f28aeb
Update rocket-chip url to gemmini-ext-spad fork
hansungk Jan 26, 2024
363b1fe
Fix outdated radiance config name
hansungk Jan 26, 2024
1c251bc
Rename vortex->radiance; disable MemtraceCoreConfig
hansungk Jan 26, 2024
87a0ce3
Bump rocket-gpu
hansungk Jan 26, 2024
6768d69
Bump radiance
hansungk Jan 26, 2024
127ba43
Update gpu binaries to vecaddloop
hansungk Jan 26, 2024
9758172
Print rocket-gpu dirs
hansungk Jan 26, 2024
3ba386d
Remove chipyard-coalescer key
hansungk Jan 26, 2024
eed6959
Include date in conda env grep to prevent miss on date-change
hansungk Jan 26, 2024
4582407
Re-enable chipyard-coalescer
hansungk Jan 26, 2024
a1ff85a
Bump radiance
hansungk Jan 26, 2024
a27b509
Remove whitespaces
hansungk Jan 26, 2024
647d829
Merge branch 'graphics-ci' into graphics
hansungk Jan 26, 2024
0a64a7a
Expose core cease to top-level IO and connect to harness
hansungk Jan 27, 2024
7d761fd
Bump radiance
hansungk Jan 27, 2024
5549967
Rename HasCeaseSuccessIO -> HasCeaseIO
hansungk Jan 27, 2024
9cc827b
Cleanup redundant config fragments
hansungk Jan 29, 2024
5a50948
Bump radiance with radpie
hansungk Jan 29, 2024
6b3362a
Add rust to conda-reqs
hansungk Jan 29, 2024
d8cc2b5
Bump radiance
hansungk Jan 29, 2024
2c85ab3
Add radiance mk fragment
hansungk Jan 29, 2024
44df3be
gitignore rundir in vlsi
hansungk Jan 29, 2024
4beaff1
trigger CI
hansungk Jan 30, 2024
040b943
Update lockfiles with rust
hansungk Jan 30, 2024
89a9eab
Revert "Update lockfiles with rust"
hansungk Jan 30, 2024
6cee7f7
Fix quotes for date command in conda env filter
hansungk Jan 30, 2024
7b6a694
Remove rust from conda-reqs to fix scala const error
hansungk Jan 30, 2024
9ee009b
Add back rust to conda-reqs
hansungk Jan 30, 2024
44fbff2
Constrain openjdk to <20
hansungk Jan 30, 2024
d9ce228
Update conda locks file
hansungk Jan 30, 2024
88d75df
Comment out delete old checkout in run-test jobs
hansungk Jan 30, 2024
f24e6f4
Add radpie to rtl build cache path
hansungk Jan 30, 2024
5235ae8
Re-enable checkout reset on jobs
hansungk Jan 30, 2024
25851bc
Left out something
hansungk Jan 30, 2024
98a6daa
Add RadianceFuzzerConfig to CI
hansungk Jan 30, 2024
b9fb359
Fix wrong project key for fuzzer config
hansungk Jan 31, 2024
fd5fa7b
Merge branch 'main' of https://github.com/ucb-bar/chipyard into graphics
richardyrh Feb 3, 2024
1b1e558
add rocket-chip to gitmodules
buggy213 Feb 4, 2024
446e8fe
Move vortex-specific EXTRA_SIM_PREPROC_DEFINES to mk fragment
hansungk Feb 2, 2024
f8f091f
Bump radiance and rocket-gpu
hansungk Feb 5, 2024
dd4495a
Bump gemmini
hansungk Feb 5, 2024
01a1ba7
bump gemmini and radiance
richardyrh Feb 5, 2024
acd879f
bump radiance
richardyrh Feb 5, 2024
ec9bc51
Add rust back to conda-reqs; generate lockfile
hansungk Feb 6, 2024
2192ce3
Add failing fuzzer config; bump radiance and rocket-gpu
hansungk Feb 6, 2024
88eb149
Bump radiance
hansungk Feb 7, 2024
2914e2b
bump radiance and gemmini with spad fixes
richardyrh Feb 7, 2024
bdf898f
Merge branch 'graphics' of https://github.com/hansungk/chipyard into …
richardyrh Feb 7, 2024
1026b44
bump gemmini and radiance
richardyrh Feb 24, 2024
260692b
delete gemmini config in RadianceGemminiConfig
richardyrh Feb 24, 2024
a59557e
Bump radiance
hansungk Feb 28, 2024
9718ca9
Fix configs to use updated SIMT params
hansungk Feb 28, 2024
4821fb3
[ci] Disable weekly chipyard-full-flow
hansungk Feb 28, 2024
16a1eb0
Add RadianceClusterConfig
hansungk Mar 1, 2024
a99e95f
Add back generators/rocket-gpu
hansungk Mar 1, 2024
92a0e53
Bump radiance
hansungk Mar 1, 2024
0481b9a
Bump radiance
hansungk Mar 1, 2024
d2f99f4
Bump radiance with cluster code
hansungk Mar 4, 2024
6448208
Bump rocket-chip with cluster code
hansungk Mar 4, 2024
1c4af26
Use WithRadianceCluster instead of WithCluster
hansungk Mar 4, 2024
3e6ae39
Change rocket-chip remote path to hansungk/
hansungk Mar 4, 2024
e58a1c6
bump radiance and gemmini
richardyrh Mar 20, 2024
7500f55
Make RadianceConfig use cluster fragment
hansungk Mar 23, 2024
1f84c88
Bump radiance
hansungk Mar 23, 2024
9dcb7f7
Bump rocket-gpu
hansungk Mar 23, 2024
fbfa867
Bump radiance
hansungk Mar 23, 2024
157a17d
Use existing ssh-agent instead of spinning up new
hansungk Mar 23, 2024
bc43d91
Fix wrongly parsed ssh command
hansungk Mar 23, 2024
2392649
Don't set SSH_AUTH_SOCK
hansungk Mar 23, 2024
56cccff
update radiance gemmini config, bump submodules
richardyrh Mar 27, 2024
bfa014b
Merge branch 'graphics' of https://github.com/hansungk/chipyard into …
richardyrh Mar 27, 2024
f718d58
bump radiance and gemmini
richardyrh Apr 1, 2024
a214316
update radiance config to use 8 banks and 8 mem lanes
richardyrh Apr 10, 2024
d9153ef
bump gemmini and radiance
richardyrh Apr 10, 2024
1376612
add printf script, bump gemmini and radiance
richardyrh Apr 15, 2024
c03e278
Make RadianceBaseConfig accept filename for args bin
hansungk Apr 1, 2024
4cda3c8
Bump rocket-chip with ceasenode fix
hansungk Apr 15, 2024
d5ff467
Bump rocket-gpu
hansungk Apr 15, 2024
f77f1ed
Add fpnew packages and include dirs to vcs flags
hansungk Apr 15, 2024
bd644d7
Fix single-core RadianceConfig
hansungk Apr 15, 2024
44727de
Add EXTRA_SIM_OUT_NAME
hansungk Apr 17, 2024
89deaf4
WIP: disable Gemmini tile temporarily
hansungk Apr 17, 2024
e75c77a
synthesizable radiance
richardyrh Apr 18, 2024
d0b274a
Merge branch 'main' of https://github.com/ucb-bar/chipyard into ucb-b…
richardyrh Apr 20, 2024
7cf0801
bump all upstreamed submodules
richardyrh Apr 20, 2024
3eaec27
firesim config
richardyrh Apr 21, 2024
df51c6d
Merge branch 'graphics' of https://github.com/hansungk/chipyard into …
richardyrh Apr 21, 2024
40c5188
add circt to submodules to reflect changes in upstream
buggy213 Apr 24, 2024
52a7296
wide dram support, configurable gemmini fsm, deadlock fixes
richardyrh Apr 28, 2024
5a98716
Merge branch 'graphics' of https://github.com/hansungk/chipyard into …
richardyrh Apr 28, 2024
74c9eef
Merge remote-tracking branch 'origin/graphics' into graphics
hansungk Apr 29, 2024
b3f9022
bump gemmini and radiance
richardyrh May 7, 2024
7fe707f
shrink queue sizes in config
richardyrh May 7, 2024
81847ae
sram flow & firesim flow
richardyrh May 7, 2024
724fd91
Merge branch 'graphics' of https://github.com/hansungk/chipyard into …
richardyrh May 7, 2024
3dc58de
Add parallel flag to VCS/Verilator C compilation
hansungk May 1, 2024
1173383
Bump rocket-gpu
hansungk May 1, 2024
486cde6
common.mk: doc EXTRA_SIM_OUT_NAME
hansungk May 6, 2024
d86f13d
support dedicated printf buffer output
richardyrh May 8, 2024
b1beb32
Merge branch 'graphics' of https://github.com/hansungk/chipyard into …
richardyrh May 8, 2024
594f0f7
new shared memory config
richardyrh May 16, 2024
eab9eab
support for .out printf
richardyrh May 16, 2024
a18c5de
Merge branch 'main' of https://github.com/ucb-bar/chipyard into ucb-b…
richardyrh May 16, 2024
30bdd1e
bump radiance
richardyrh May 16, 2024
1e5b468
vcs.mk: Ignore null statement lint
hansungk May 10, 2024
1d20177
Bump radiance
hansungk May 23, 2024
8c6c1d8
Revert riscv-isa-sim and riscv-pk
hansungk May 23, 2024
f11739b
Add chiseltest dep for radiance in build.sbt
hansungk May 31, 2024
7468118
bunch of stuff dont remember
richardyrh Jun 9, 2024
c824ea0
Merge branch 'graphics' of https://github.com/hansungk/chipyard into …
richardyrh Jun 9, 2024
ff484f7
power flow makefiles
richardyrh Jun 9, 2024
ef9c9a1
redirect firesim to fork and bump firesim
richardyrh Jun 11, 2024
c3f2ee1
Expand BINARIES in common.mk
hansungk Jun 4, 2024
a9634b4
Set serializeUnaligned = false by default; remove args.bin ROM
hansungk Jun 12, 2024
763ad0f
Add two cluster config
hansungk Jun 12, 2024
837dfbd
Bump rocket-chip with cluster fix
hansungk Jun 12, 2024
b901000
Bump radiance
hansungk Jun 12, 2024
d3aff01
dual core gemmini and quad core vortex config
richardyrh Jun 12, 2024
3ab8fc7
Merge branch 'graphics' of https://github.com/hansungk/chipyard into …
richardyrh Jun 12, 2024
89fc4ad
bump radiance
richardyrh Jun 12, 2024
5e8a746
make: Remove obsolete args rom dependency
hansungk Jun 12, 2024
9a2d37e
common.mk: Add run-binary-as-background target
hansungk Jun 12, 2024
6d8a07f
Bump rocket-gpu
hansungk Jun 26, 2024
84265dd
Bump radiance
hansungk Jun 26, 2024
5eda799
Change RadianceSmem16KConfig to 4 cores
hansungk Jun 27, 2024
f243123
Add 1-core 1-Gemmini small cluster config
hansungk Jun 27, 2024
2c390cd
Merge remote-tracking branch 'upstream/main' into graphics
hansungk Jun 27, 2024
f91d8e3
Bump rocket-chip after merging
hansungk Jun 28, 2024
02eedb8
Fix module imports after rocket-chip bump
hansungk Jun 28, 2024
cc018c2
Bump radiance with import fix
hansungk Jun 28, 2024
9d0f02e
Bump radiance
hansungk Jul 19, 2024
dd6a91e
big little configs
richardyrh Jul 21, 2024
39e35be
redirect firesim
richardyrh Jul 21, 2024
8e5e717
point to correct bootrom for firesim
richardyrh Jul 21, 2024
8518e33
syn and power yamls
richardyrh Jul 21, 2024
749b61d
Merge branch 'graphics' of https://github.com/hansungk/chipyard into …
richardyrh Jul 21, 2024
1aaded0
doc: Don't point to radiance.mk for config
hansungk Jul 23, 2024
845679b
Bump radiance
hansungk Jul 26, 2024
8b9fee0
vlsi: Add make_syn_f.sh to VLSI_RTL target
hansungk Jul 30, 2024
c1b3fd9
add data type config support
richardyrh Aug 6, 2024
89788cb
Merge branch 'graphics' of https://github.com/hansungk/chipyard into …
richardyrh Aug 6, 2024
f4deafc
bump radiance
richardyrh Aug 6, 2024
3c1ea26
vcs.mk: Squelch unnamed assertion lint message
hansungk Aug 7, 2024
14cb95d
Bump radiance & rocket-gpu
hansungk Aug 15, 2024
6cf9587
Bump radiance
hansungk Aug 28, 2024
6f3ddc2
8 core fp16 config, bump radiance
richardyrh Sep 5, 2024
403a922
Merge branch 'graphics' of https://github.com/hansungk/chipyard into …
richardyrh Sep 5, 2024
955e96a
fp16 config, bump radiance
richardyrh Sep 8, 2024
1e85033
Bump radiance with fp16 param
hansungk Sep 10, 2024
ae427a8
vlsi changes
richardyrh Sep 22, 2024
4b729b7
bump radiance and cleanup configs; add print util script
richardyrh Sep 27, 2024
ec50f56
Increase numWords to 16 for FP16Cluster config; 256KB SMEM for defaul…
hansungk Oct 2, 2024
c46c2cf
add 4 core fp16 config and bump radiance
richardyrh Oct 7, 2024
592d20c
Merge branch 'graphics' of https://github.com/hansungk/chipyard into …
richardyrh Oct 7, 2024
3c4dc2e
add core serialized config, bump radiance
richardyrh Oct 16, 2024
8fec693
emergency push
richardyrh Oct 21, 2024
967e382
variables.mk: Add target for tensor synthesizable unittest
hansungk Oct 15, 2024
6b232e4
Bump radiance with hopper changes
hansungk Oct 23, 2024
06555a8
Bump radiance
hansungk Oct 26, 2024
a3bf1ff
Specify no-decoupled tcore for FP16 config
hansungk Oct 28, 2024
3b00a3f
Bump radiance
hansungk Oct 28, 2024
d842a8e
Bump radiance
hansungk Oct 28, 2024
e74a231
400mhz, hopper config
richardyrh Oct 29, 2024
d6647df
Merge branch 'graphics' of https://github.com/hansungk/chipyard into …
richardyrh Oct 29, 2024
b5326c0
32k accmem
richardyrh Oct 29, 2024
eb748a7
Enable decoupled tensor for 4CFP config, switch to 8b/8w
hansungk Oct 29, 2024
d1b31c2
Bump radiance
hansungk Oct 29, 2024
3728e48
Bump radiance
hansungk Oct 30, 2024
ce8c0c4
fix hopper smem config
richardyrh Oct 30, 2024
60df9c5
reduce num words
richardyrh Nov 2, 2024
48199b0
Fix RadianceClusterConfig for flashattention
hansungk Nov 9, 2024
bb35719
radiance cluster config use 8x8 smem
richardyrh Nov 9, 2024
23e63a1
Merge branch 'graphics' of https://github.com/hansungk/chipyard into …
richardyrh Nov 9, 2024
07df24f
Bump gemmini with recoding fix
hansungk Nov 9, 2024
9f37aa7
Bump radiance
hansungk Nov 10, 2024
1d630c4
Bump gemmini
hansungk Nov 10, 2024
dd218cf
Bump radiance
hansungk Nov 15, 2024
367a670
Bump gemmini to dma fix
hansungk Nov 15, 2024
a68f99a
Configure harness binder clock freq
hansungk Jan 5, 2025
dd70060
Add RadianceEmulatorConfig
hansungk Jan 5, 2025
4cae72d
Change submodule URL to https
hansungk Jan 28, 2025
7727982
Delete rocket-gpu submodule
hansungk Jan 28, 2025
3c889f3
Bump radiance
hansungk Jan 28, 2025
8d8977f
virgo fence
richardyrh Jan 29, 2025
a901590
Merge branch 'graphics' of https://github.com/hansungk/chipyard into …
richardyrh Jan 29, 2025
6efb3fe
Merge remote-tracking branch 'origin/graphics' into asplos-ae
hansungk Jan 29, 2025
078a38a
scripts to compile and run experiments
richardyrh Jan 30, 2025
c28c4f8
bump radiance
richardyrh Jan 30, 2025
fa076cf
update smem script, enable 1024 sim
richardyrh Jan 30, 2025
7a88736
timeout cycles set to 0
richardyrh Jan 30, 2025
ce3fa99
update scripts
richardyrh Jan 31, 2025
922c44b
utilization calculation
richardyrh Jan 31, 2025
8e841f3
update env script
richardyrh Jan 31, 2025
4f3dca2
Bump radiance
hansungk Jan 31, 2025
f7a7444
bump radiance
richardyrh Jan 31, 2025
e95ffe0
Merge branch 'asplos-ae' of https://github.com/hansungk/chipyard into…
richardyrh Jan 31, 2025
4187738
Add missing flash compile and run script
hansungk Jan 31, 2025
8c228a6
sanity script, bump radiance
richardyrh Jan 31, 2025
fde4844
remove ae scripts and bump radiance
richardyrh Feb 1, 2025
322e646
Merge branch 'main' of https://github.com/ucb-bar/chipyard into graphics
richardyrh Feb 6, 2025
ea61638
Merge branch 'ucb-bar-main' into graphics
richardyrh Feb 6, 2025
0ea42f4
Merge branch 'main' of https://github.com/ucb-bar/chipyard into ucb-b…
richardyrh Feb 6, 2025
b5dc6f4
Merge branch 'ucb-bar-main' into graphics
richardyrh Feb 6, 2025
3303339
file level cleanup
richardyrh Feb 7, 2025
b40330a
more cleanup: remove cease io, clean up makefiles, update submodules …
richardyrh Feb 7, 2025
74dc216
Merge branch 'main' of https://github.com/ucb-bar/chipyard into ucb-b…
richardyrh Feb 7, 2025
463c5ad
Merge branch 'ucb-bar-main' into graphics
richardyrh Feb 7, 2025
b5a46de
fix makefile
richardyrh Feb 7, 2025
baef821
fix configs, scripts, makefile, and other stuff for merge
richardyrh Feb 8, 2025
c065fd5
bump radiance and testchipip
richardyrh Feb 8, 2025
fe9672b
Merge branch 'main' of https://github.com/ucb-bar/chipyard into graphics
richardyrh Feb 8, 2025
8d261ba
remove extra newline
richardyrh Feb 8, 2025
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2 changes: 1 addition & 1 deletion .github/scripts/check-commit.sh
Original file line number Diff line number Diff line change
Expand Up @@ -46,7 +46,7 @@ search () {
}


submodules=("cva6" "boom" "ibex" "gemmini" "icenet" "nvdla" "rocket-chip" "rocket-chip-blocks" "rocket-chip-inclusive-cache" "testchipip" "riscv-sodor" "mempress" "bar-fetchers" "shuttle" "constellation" "fft-generator" "hardfloat" "caliptra-aes-acc" "rocc-acc-utils" "diplomacy" "rerocc" "compress-acc" "saturn" "ara" "vexiiriscv" "tacit")
submodules=("cva6" "boom" "ibex" "gemmini" "icenet" "nvdla" "rocket-chip" "rocket-chip-blocks" "rocket-chip-inclusive-cache" "testchipip" "riscv-sodor" "mempress" "bar-fetchers" "shuttle" "constellation" "fft-generator" "hardfloat" "caliptra-aes-acc" "rocc-acc-utils" "diplomacy" "rerocc" "compress-acc" "saturn" "ara" "vexiiriscv" "tacit" "radiance")
dir="generators"
branches=("master" "main" "dev")
search
Expand Down
5 changes: 4 additions & 1 deletion .gitmodules
Original file line number Diff line number Diff line change
Expand Up @@ -48,7 +48,7 @@
url = https://github.com/ucb-bar/rocc-acc-utils.git
[submodule "generators/rocket-chip"]
path = generators/rocket-chip
url = https://github.com/chipsalliance/rocket-chip.git
url = https://github.com/richardyrh/rocket-chip.git
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Revert this.

[submodule "generators/rocket-chip-blocks"]
path = generators/rocket-chip-blocks
url = https://github.com/chipsalliance/rocket-chip-blocks.git
Expand Down Expand Up @@ -157,3 +157,6 @@
[submodule "generators/tacit"]
path = generators/tacit
url = https://github.com/ucb-bar/tacit.git
[submodule "generators/radiance"]
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You should add radiance to the .github/scripts/check-commit.sh script

path = generators/radiance
url = https://github.com/ucb-bar/radiance.git
13 changes: 12 additions & 1 deletion build.sbt
Original file line number Diff line number Diff line change
Expand Up @@ -156,7 +156,7 @@ lazy val testchipip = (project in file("generators/testchipip"))
lazy val chipyard = (project in file("generators/chipyard"))
.dependsOn(testchipip, rocketchip, boom, rocketchip_blocks, rocketchip_inclusive_cache,
dsptools, rocket_dsp_utils,
gemmini, icenet, tracegen, cva6, nvdla, sodor, ibex, fft_generator,
radiance, gemmini, icenet, tracegen, cva6, nvdla, sodor, ibex, fft_generator,
constellation, mempress, barf, shuttle, caliptra_aes, rerocc,
compressacc, saturn, ara, firrtl2_bridge, vexiiriscv, tacit)
.settings(libraryDependencies ++= rocketLibDeps.value)
Expand Down Expand Up @@ -243,6 +243,17 @@ lazy val sodor = (project in file("generators/riscv-sodor"))
.settings(libraryDependencies ++= rocketLibDeps.value)
.settings(commonSettings)

lazy val radiance = (project in file("generators/radiance"))
.dependsOn(rocketchip, gemmini)
.settings(libraryDependencies ++= rocketLibDeps.value)
.settings(libraryDependencies ++= Seq(
"edu.berkeley.cs" %% "chiseltest" % chiselTestVersion,
"org.scalatest" %% "scalatest" % "3.2.+" % "test",
"junit" % "junit" % "4.13" % "test",
"org.scalacheck" %% "scalacheck" % "1.14.3" % "test",
))
.settings(commonSettings)

lazy val gemmini = freshProject("gemmini", file("generators/gemmini"))
.dependsOn(rocketchip)
.settings(libraryDependencies ++= rocketLibDeps.value)
Expand Down
29 changes: 25 additions & 4 deletions common.mk
Original file line number Diff line number Diff line change
Expand Up @@ -16,6 +16,8 @@ HELP_COMPILATION_VARIABLES += \
" EXTRA_SIM_LDFLAGS = additional LDFLAGS for building simulators" \
" EXTRA_SIM_SOURCES = additional simulation sources needed for simulator" \
" EXTRA_SIM_REQS = additional make requirements to build the simulator" \
" EXTRA_SIM_OUT_NAME = additional suffix appended to the simulation .out log filename" \
" EXTRA_SIM_PREPROC_DEFINES = additional defines passed to the simulator" \
" ENABLE_YOSYS_FLOW = if set, add compilation flags to enable the vlsi flow for yosys(tutorial flow)" \
" EXTRA_CHISEL_OPTIONS = additional options to pass to the Chisel compiler" \
" MFC_BASE_LOWERING_OPTIONS = override lowering options to pass to the MLIR FIRRTL compiler" \
Expand All @@ -26,6 +28,7 @@ EXTRA_SIM_CXXFLAGS ?=
EXTRA_SIM_LDFLAGS ?=
EXTRA_SIM_SOURCES ?=
EXTRA_SIM_REQS ?=
EXTRA_SIM_OUT_NAME ?=

ifneq ($(ASPECTS), )
comma = ,
Expand Down Expand Up @@ -67,6 +70,7 @@ include $(base_dir)/generators/ibex/ibex.mk
include $(base_dir)/generators/ara/ara.mk
include $(base_dir)/generators/tracegen/tracegen.mk
include $(base_dir)/generators/nvdla/nvdla.mk
include $(base_dir)/generators/radiance/radiance.mk
include $(base_dir)/tools/torture.mk

#########################################################################################
Expand Down Expand Up @@ -233,6 +237,8 @@ $(TOP_SMEMS_CONF) $(MODEL_SMEMS_CONF) &: $(MFC_SMEMS_CONF) $(MFC_MODEL_HRCHY_JS
--model-module-name $(MODEL) \
--out-dut-smems-conf $(TOP_SMEMS_CONF) \
--out-model-smems-conf $(MODEL_SMEMS_CONF)
# for blackboxed SRAMs: define mem here and use generated module name in blackbox source
-[ -f $(base_dir)/vlsi/add.mem.conf ] && cat $(base_dir)/vlsi/add.mems.conf >> $(TOP_SMEMS_CONF)
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I think there's a cleaner way to do this. What if you have the generator emit a supplementary file .custom.mems.conf via addResource in rocket-chip? Then in this make job, concatenate that file into TOP_SMEMS_CONF if it exists.

I don't like having this magic file in the vlsi/ directory.


# This file is for simulation only. VLSI flows should replace this file with one containing hard SRAMs
TOP_MACROCOMPILER_MODE ?= --mode synflops
Expand Down Expand Up @@ -305,15 +311,15 @@ get_loadarch_flag = +loadarch=$(subst mem.elf,loadarch,$(1))
endif

# get the output path base name for simulation outputs, First arg is the binary
get_sim_out_name = $(output_dir)/$(call get_out_name,$(1))
get_sim_out_name = $(output_dir)/$(call get_out_name,$(1))$(if $(EXTRA_SIM_OUT_NAME),.$(EXTRA_SIM_OUT_NAME),)
# sim flags that are common to run-binary/run-binary-fast/run-binary-debug
get_common_sim_flags = $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(SEED_FLAG) $(call get_loadmem_flag,$(1)) $(call get_loadarch_flag,$(1))

.PHONY: %.run %.run.debug %.run.fast

# run normal binary with hardware-logged insn dissassembly
run-binary: check-binary $(BINARY).run
run-binaries: check-binaries $(addsuffix .run,$(BINARIES))
run-binaries: check-binaries $(addsuffix .run,$(wildcard $(BINARIES)))

%.run: %.check-exists $(SIM_PREREQ) | $(output_dir)
(set -o pipefail && $(NUMA_PREFIX) $(sim) \
Expand All @@ -327,7 +333,7 @@ run-binaries: check-binaries $(addsuffix .run,$(BINARIES))

# run simulator as fast as possible (no insn disassembly)
run-binary-fast: check-binary $(BINARY).run.fast
run-binaries-fast: check-binaries $(addsuffix .run.fast,$(BINARIES))
run-binaries-fast: check-binaries $(addsuffix .run.fast,$(wildcard $(BINARIES)))

%.run.fast: %.check-exists $(SIM_PREREQ) | $(output_dir)
(set -o pipefail && $(NUMA_PREFIX) $(sim) \
Expand All @@ -340,7 +346,9 @@ run-binaries-fast: check-binaries $(addsuffix .run.fast,$(BINARIES))

# run simulator with as much debug info as possible
run-binary-debug: check-binary $(BINARY).run.debug
run-binaries-debug: check-binaries $(addsuffix .run.debug,$(BINARIES))
run-binary-debug-bg: check-binary $(BINARY).run.debug.bg
run-binaries-debug: check-binaries $(addsuffix .run.debug,$(wildcard $(BINARIES)))
run-binaries-debug-bg: check-binaries $(addsuffix .run.debug.bg,$(wildcard $(BINARIES)))

%.run.debug: %.check-exists $(SIM_DEBUG_PREREQ) | $(output_dir)
ifeq (1,$(DUMP_BINARY))
Expand All @@ -356,6 +364,19 @@ endif
$(BINARY_ARGS) \
</dev/null 2> >(spike-dasm > $(call get_sim_out_name,$*).out) | tee $(call get_sim_out_name,$*).log)

%.run.debug.bg: %.check-exists $(SIM_DEBUG_PREREQ) | $(output_dir)
if [ "$*" != "none" ]; then riscv64-unknown-elf-objdump -D -S $* > $(call get_sim_out_name,$*).dump ; fi
(set -o pipefail && $(NUMA_PREFIX) $(sim_debug) \
$(PERMISSIVE_ON) \
$(call get_common_sim_flags,$*) \
$(VERBOSE_FLAGS) \
$(call get_waveform_flag,$(call get_sim_out_name,$*)) \
$(PERMISSIVE_OFF) \
$* \
$(BINARY_ARGS) \
</dev/null 2> >(spike-dasm > $(call get_sim_out_name,$*).out) >$(call get_sim_out_name,$*).log \
& echo "PID=$$!")

run-fast: run-asm-tests-fast run-bmark-tests-fast

#########################################################################################
Expand Down
2 changes: 2 additions & 0 deletions generators/chipyard/src/main/scala/DigitalTop.scala
Original file line number Diff line number Diff line change
Expand Up @@ -31,6 +31,8 @@ class DigitalTop(implicit p: Parameters) extends ChipyardSystem
with sifive.blocks.devices.gpio.HasPeripheryGPIO // Enables optionally adding the sifive GPIOs
with sifive.blocks.devices.spi.HasPeripherySPIFlash // Enables optionally adding the sifive SPI flash controller
with sifive.blocks.devices.spi.HasPeripherySPI // Enables optionally adding the sifive SPI port
with radiance.memory.CanHaveMemtraceCore // Enables memtrace core
with radiance.memory.CanHaveRadianceROMs // Enables radiance argument ROMs
with icenet.CanHavePeripheryIceNIC // Enables optionally adding the IceNIC for FireSim
with chipyard.example.CanHavePeripheryInitZero // Enables optionally adding the initzero example widget
with chipyard.example.CanHavePeripheryGCD // Enables optionally adding the GCD example widget
Expand Down
20 changes: 20 additions & 0 deletions generators/chipyard/src/main/scala/config/CoalescerConfigs.scala
Original file line number Diff line number Diff line change
@@ -0,0 +1,20 @@
package chipyard

import org.chipsalliance.cde.config.{Config}
import freechips.rocketchip.prci.AsynchronousCrossing

class MemtraceCoreConfig extends Config(
// Memtrace
new radiance.subsystem.WithMemtraceCore("vecadd.core1.thread4.trace",
traceHasSource = false) ++
// new radiance.subsystem.WithMemtraceCore("nvbit.vecadd.n100000.filter_sm0.lane32.trace",
// traceHasSource = false) ++
new radiance.subsystem.WithCoalescer(nNewSrcIds = 2) ++
new radiance.subsystem.WithSimtConfig(nMemLanes = 4, nSrcIds = 8) ++
// L2
new freechips.rocketchip.subsystem.WithInclusiveCache(nWays=8, capacityKB=512) ++
new freechips.rocketchip.subsystem.WithNBanks(4) ++
new chipyard.config.WithSystemBusWidth(16 * 8) ++
new chipyard.NoCoresConfig
)

157 changes: 157 additions & 0 deletions generators/chipyard/src/main/scala/config/RadianceConfigs.scala
Original file line number Diff line number Diff line change
@@ -0,0 +1,157 @@
package chipyard

import chipyard.config.AbstractConfig
import chipyard.stage.phases.TargetDirKey
import freechips.rocketchip.devices.tilelink.BootROMLocated
import freechips.rocketchip.resources.BigIntHexContext
import freechips.rocketchip.subsystem._
import org.chipsalliance.cde.config.Config
import radiance.subsystem.RadianceGemminiDataType

// ----------------
// Radiance Configs
// ----------------

// aliases for virgo
class VirgoConfig extends RadianceClusterConfig
class VirgoFP16Config extends RadianceFP16ClusterConfig
class VirgoHopperConfig extends Radiance4CFP16ClusterConfig
class VirgoFlashConfig extends RadianceClusterConfig
class VirgoSynConfig extends RadianceClusterSynConfig
class VirgoFP16SynConfig extends RadianceFP16ClusterSynConfig
class VirgoHopperSynConfig extends Radiance4CFP16ClusterSynConfig

class RadianceBaseConfig extends Config(
// NOTE: when changing these, remember to change NUM_CORES/THREADS/WARPS in
// the verilog source as well!
new radiance.subsystem.WithSimtConfig(nWarps = 8, nCoreLanes = 8, nMemLanes = 8, nSrcIds = 32) ++
new chipyard.config.WithSystemBusWidth(bitWidth = 256) ++
new WithExtMemSize(BigInt("80000000", 16)) ++
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Nit: leaving the full package paths here is cleaner I think (including chipyard.AbstractConfig)

new WithRadBootROM() ++
new radiance.subsystem.WithRadianceSimParams(true) ++
new WithCacheBlockBytes(64) ++
new freechips.rocketchip.subsystem.WithNMemoryChannels(2) ++
new freechips.rocketchip.subsystem.WithEdgeDataBits(256) ++

new chipyard.config.WithPeripheryBusFrequency(400.0) ++
new chipyard.config.WithMemoryBusFrequency(400.0) ++
new chipyard.config.WithControlBusFrequency(400.0) ++
new chipyard.config.WithSystemBusFrequency(400.0) ++
new chipyard.config.WithFrontBusFrequency(400.0) ++
new chipyard.config.WithOffchipBusFrequency(400.0) ++
new chipyard.harness.WithHarnessBinderClockFreqMHz(400.0) ++
new AbstractConfig)

class RadianceFP16ClusterConfig extends Config(
new radiance.subsystem.WithRadianceGemmini(location = InCluster(0), dim = 16, accSizeInKB = 32, tileSize = (8, 4, 8), dataType = RadianceGemminiDataType.FP16) ++
new radiance.subsystem.WithRadianceCores(8, location = InCluster(0), tensorCoreFP16 = true, tensorCoreDecoupled = false, useVxCache = false) ++
new radiance.subsystem.WithRadianceSharedMem(address = x"ff000000", size = 128 << 10, numBanks = 4, numWords = 16) ++
new radiance.subsystem.WithCoalescer(nNewSrcIds = 16) ++
new radiance.subsystem.WithVortexL1Banks(nBanks = 8) ++
new radiance.subsystem.WithRadianceCluster(0) ++
new RadianceBaseConfig)

class Radiance8B8WFP16ClusterConfig extends Config(
new radiance.subsystem.WithRadianceGemmini(location = InCluster(0), dim = 16, accSizeInKB = 32, tileSize = (8, 4, 8), dataType = RadianceGemminiDataType.FP16) ++
new radiance.subsystem.WithRadianceCores(8, location = InCluster(0), tensorCoreFP16 = true, tensorCoreDecoupled = false, useVxCache = false) ++
new radiance.subsystem.WithRadianceSharedMem(address = x"ff000000", size = 128 << 10, numBanks = 8, numWords = 8) ++
new radiance.subsystem.WithCoalescer(nNewSrcIds = 16) ++
new radiance.subsystem.WithVortexL1Banks(nBanks = 8) ++
new radiance.subsystem.WithRadianceCluster(0) ++
new RadianceBaseConfig)

class Radiance4CFP16ClusterConfig extends Config(
new radiance.subsystem.WithRadianceGemmini(location = InCluster(0), dim = 16, accSizeInKB = 32, tileSize = (8, 4, 8), dataType = RadianceGemminiDataType.FP16) ++
new radiance.subsystem.WithRadianceCores(4, location = InCluster(0), tensorCoreFP16 = true, tensorCoreDecoupled = true, useVxCache = false) ++
// new radiance.subsystem.WithRadianceSharedMem(address = x"ff000000", size = 128 << 10, numBanks = 4, numWords = 16,
// memType = radiance.subsystem.TwoReadOneWrite,
// serializeUnaligned = radiance.subsystem.CoreSerialized) ++
// NOTE: Hopper Tensor Core does not work with 16-word config due to the
// address alignment requirement
new radiance.subsystem.WithRadianceSharedMem(address = x"ff000000", size = 128 << 10, numBanks = 4, numWords = 8) ++
new radiance.subsystem.WithCoalescer(nNewSrcIds = 16) ++
new radiance.subsystem.WithVortexL1Banks(nBanks = 8) ++
new radiance.subsystem.WithRadianceCluster(0) ++
new RadianceBaseConfig)

class RadianceClusterConfig extends Config(
// important to keep gemmini tile before RadianceCores to ensure radiance tile id is 0-indexed
new radiance.subsystem.WithRadianceGemmini(location = InCluster(0), dim = 8, accSizeInKB = 16, tileSize = 8) ++
new radiance.subsystem.WithRadianceCores(4, location = InCluster(0), tensorCoreFP16 = false, tensorCoreDecoupled = false, useVxCache = false) ++
// new radiance.subsystem.WithRadianceFrameBuffer(x"ff018000", 16, 0x8000, x"ff011000", "fb0") ++
new radiance.subsystem.WithRadianceSharedMem(address = x"ff000000", size = 256 << 10/*KBytes*/, numBanks = 8, numWords = 8,
// memType = radiance.subsystem.TwoReadOneWrite,
serializeUnaligned = radiance.subsystem.CoreSerialized) ++
new radiance.subsystem.WithCoalescer(nNewSrcIds = 16) ++
new radiance.subsystem.WithVortexL1Banks(nBanks = 8) ++
new radiance.subsystem.WithRadianceCluster(0) ++
new RadianceBaseConfig)

class RadianceClusterSmem16KConfig extends Config(
new radiance.subsystem.WithRadianceGemmini(location = InCluster(0), dim = 8, accSizeInKB = 4, tileSize = 4) ++
new radiance.subsystem.WithRadianceCores(4, location = InCluster(0), useVxCache = false) ++
new radiance.subsystem.WithRadianceSharedMem(address = x"ff000000", size = 16 << 10/*KBytes*/, numBanks = 4, numWords = 8) ++ // serializeUnaligned: false
new radiance.subsystem.WithCoalescer(nNewSrcIds = 16) ++
new radiance.subsystem.WithVortexL1Banks(nBanks = 8)++
new radiance.subsystem.WithRadianceCluster(0) ++
new RadianceBaseConfig)

class RadianceTwoClustersSmem16KConfig extends Config(
new radiance.subsystem.WithRadianceGemmini(location = InCluster(0), dim = 8, accSizeInKB = 4, tileSize = 4) ++
new radiance.subsystem.WithRadianceCores(2, location = InCluster(0), useVxCache = false) ++
new radiance.subsystem.WithRadianceGemmini(location = InCluster(1), dim = 8, accSizeInKB = 4, tileSize = 4) ++
new radiance.subsystem.WithRadianceCores(2, location = InCluster(1), useVxCache = false) ++
new radiance.subsystem.WithRadianceSharedMem(address = x"ff000000", size = 16 << 10, numBanks = 4, numWords = 8) ++
new radiance.subsystem.WithCoalescer(nNewSrcIds = 16) ++
new radiance.subsystem.WithVortexL1Banks(nBanks = 8)++
new radiance.subsystem.WithRadianceCluster(0) ++
new radiance.subsystem.WithRadianceCluster(1) ++
new RadianceBaseConfig)

class RadianceBigLittleClusterConfig extends Config(
new radiance.subsystem.WithRadianceGemmini(location = InCluster(0), dim = 4, accSizeInKB = 16, tileSize = 16) ++
new radiance.subsystem.WithRadianceGemmini(location = InCluster(0), dim = 8, accSizeInKB = 16, tileSize = 8) ++
new radiance.subsystem.WithRadianceCores(2, location = InCluster(0), useVxCache = false) ++
new radiance.subsystem.WithRadianceSharedMem(address = x"ff000000", size = 64 << 10, numBanks = 4, numWords = 8) ++
new radiance.subsystem.WithCoalescer(nNewSrcIds = 16) ++
new radiance.subsystem.WithVortexL1Banks(nBanks = 8)++
new radiance.subsystem.WithRadianceCluster(0) ++
new RadianceBaseConfig)

class RadianceClusterSynConfig extends Config(
new radiance.subsystem.WithRadianceSimParams(false) ++
new RadianceClusterConfig)

class RadianceFP16ClusterSynConfig extends Config(
new radiance.subsystem.WithRadianceSimParams(false) ++
new RadianceFP16ClusterConfig)

class Radiance4CFP16ClusterSynConfig extends Config(
new radiance.subsystem.WithRadianceSimParams(false) ++
new Radiance4CFP16ClusterConfig)

class RadianceBigLittleClusterSynConfig extends Config(
new radiance.subsystem.WithRadianceSimParams(false) ++
new RadianceBigLittleClusterConfig)

class RadianceNoCacheConfig extends Config(
new radiance.subsystem.WithRadianceCores(1, useVxCache = false) ++
new radiance.subsystem.WithCoalescer(nNewSrcIds = 8) ++
new RadianceBaseConfig)

class RadianceNoCoalConfig extends Config(
new radiance.subsystem.WithRadianceCores(1, useVxCache = false) ++
new radiance.subsystem.WithVortexL1Banks(nBanks = 1)++
new RadianceBaseConfig)

class RadianceEmulatorConfig extends Config(
new radiance.subsystem.WithEmulatorCores(1, useVxCache = false) ++
new radiance.subsystem.WithSimtConfig(nMemLanes = 4, nSrcIds = 4) ++
new AbstractConfig)

class RadianceFuzzerConfig extends Config(
new radiance.subsystem.WithFuzzerCores(1, useVxCache = false) ++
new radiance.subsystem.WithCoalescer(nNewSrcIds = 2) ++
new radiance.subsystem.WithSimtConfig(nMemLanes = 4, nSrcIds = 2) ++
new chipyard.config.WithSystemBusWidth(bitWidth = 256) ++
new AbstractConfig)
Original file line number Diff line number Diff line change
Expand Up @@ -162,6 +162,16 @@ class WithNoBootROM extends Config((site, here, up) => {
case BootROMLocated(_) => None
})

class WithRadBootROM(address: BigInt = 0x10000, size: Int = 0x10000, hang: BigInt = 0x10100) extends Config((site, here, up) => {
case BootROMLocated(x) => up(BootROMLocated(x))
.map(_.copy(
address = address,
size = size,
hang = hang,
contentFileName = s"${site(TargetDirKey)}/bootrom.radiance.rv32.img"
))
})

class WithNoBusErrorDevices extends Config((site, here, up) => {
case SystemBusKey => up(SystemBusKey).copy(errorDevice = None)
case ControlBusKey => up(ControlBusKey).copy(errorDevice = None)
Expand Down
9 changes: 9 additions & 0 deletions generators/firechip/chip/src/main/scala/TargetConfigs.scala
Original file line number Diff line number Diff line change
Expand Up @@ -343,6 +343,15 @@ class FireSimLeanGemminiRocketMMIOOnlyConfig extends Config(
new WithFireSimConfigTweaks ++
new chipyard.LeanGemminiRocketConfig)

class FireSimRadianceClusterSynConfig extends Config(
new chipyard.harness.WithHarnessBinderClockFreqMHz(500.0) ++
new chipyard.config.WithNoTraceIO ++
new WithDefaultFireSimBridges ++
new WithDefaultMemModel ++
new chipyard.WithRadBootROM ++
new WithFireSimConfigTweaks ++
new chipyard.RadianceClusterSynConfig)

class FireSimLargeBoomCospikeConfig extends Config(
new WithCospikeBridge ++
new WithDefaultFireSimBridges ++
Expand Down
2 changes: 1 addition & 1 deletion generators/gemmini
1 change: 1 addition & 0 deletions generators/radiance
Submodule radiance added at 7c7b87
3 changes: 2 additions & 1 deletion sims/common-sim-flags.mk
Original file line number Diff line number Diff line change
Expand Up @@ -38,4 +38,5 @@ SIM_PREPROC_DEFINES = \
+define+RANDOMIZE_MEM_INIT \
+define+RANDOMIZE_REG_INIT \
+define+RANDOMIZE_GARBAGE_ASSIGN \
+define+RANDOMIZE_INVALID_ASSIGN
+define+RANDOMIZE_INVALID_ASSIGN \
$(EXTRA_SIM_PREPROC_DEFINES)
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Add this to HELP_COMPILATION_VARIABLES in common.mk

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