🐛 fix bug in crt0.S interrupt setup

CHANGELOG.md

@@ -33,6 +33,7 @@ The version number is globally defined by the `hw_version_c` constant in the mai
 
 | Date (*dd.mm.yyyy*) | Version | Comment |
 |:----------:|:-------:|:--------|
+| 08.04.2022 | 1.6.9.11 | :bug: fixed bug in interrupt setup of **`crt0` start-up code** [#297](https://github.com/stnolting/neorv32/pull/297) |
 | 08.04.2022 | 1.6.9.10 | rework compressed instruction (`C` ISA extension) de-compressor: :lock: closed further illegal compressed instruction holes; code clean-ups; `mtval` CSR now shows the decompressed 32-bit instruction when executing an illegal compressed instruction; minor RTL code cleanups (removing legacy stuff); [PR #296](https://github.com/stnolting/neorv32/pull/296) |
 | 07.04.2022 | 1.6.9.9 | AND-gate CSR read address: reduces **CPU switching activity** (= dynamic power consumption) and even reduces area costs; [PR #295](https://github.com/stnolting/neorv32/pull/295) |
 | 06.04.2022 | 1.6.9.8 | :bug: fixed instruction decoding collision in CPU `B` extension; :lock: closed further illegal instruction encoding holes; optimized illegal instruction detection logic; [PR #294](https://github.com/stnolting/neorv32/pull/294) |

docs/datasheet/software.adoc

@@ -445,11 +445,12 @@ and placed right before the actual application code so it gets executed right af
 The `crt0.S` start-up performs the following operations:
 
 [start=1]
+. Disable interrupts globally by clearing <<_mstatus>>`.mie`.
 . Initialize all integer registers `x1 - x31` (or just `x1 - x15` when using the `E` CPU extension) to a defined value.
-. Initialize the global pointer `gp` and the stack pointer `sp` according to the <<_ram_layout>> provided by the linker script.
 . Initialize all CPU core CSRs and also install a default "dummy" trap handler for _all_ traps. This handler catches all traps
+** All interrupt sources are disabled and all pending interrupts are cleared.
+. Initialize the global pointer `gp` and the stack pointer `sp` according to the <<_ram_layout>> provided by the linker script.
 during the early boot phase.
-. All interrupt sources are disabled and all pending interrupts are cleared.
 . Clear all counter CSRs and stop auto-increment.
 . Clear IO area: Write zero to all memory-mapped registers within the IO region (`iodev` section). If certain devices have not
 been implemented, a bus access fault exception will occur. This exception is captured by the dummy trap handler.

docs/userguide/debugging_with_ocd.adoc

@@ -175,6 +175,13 @@ After the upload, GDB will make the processor jump to the beginning of the uploa
 (by default, this is the beginning of the instruction memory at `0x00000000`) skipping the bootloader
 and halting the CPU right before executing the `blink_led` application.
 
+[IMPORTANT]
+After gdb has connected to the CPU, it is recommended to disable the CPU's global interrupt flag
+(`mstatus.mie`, = bit #3) to prevent unintended calls of potentially outdated trap handlers. The global
+interrupt flag can be cleared using the following gdb command:
+`set $mstatus = ($mstatus & ~(1<<3))`. Interrupts can be enabled globally again by the following command:
+`set $mstatus = ($mstatus | (1<<3))`.
+
 
 :sectnums:
 ==== Software Breakpoints