[rtl] Cleanup/update assertions and "auto-configuration" (#738)

CHANGELOG.md

@@ -32,6 +32,7 @@ mimpid = 0x01040312 -> Version 01.04.03.12 -> v1.4.3.12
 
 | Date (*dd.mm.yyyy*) | Version | Comment |
 |:-------------------:|:-------:|:--------|
+| 25.11.2023 | 1.9.1.7 | cleanup/update assertions and auto-adjusting of invalid generic configurations; [#738](https://github.com/stnolting/neorv32/pull/738) |
 | 25.11.2023 | 1.9.1.6 | :sparkles: add option for "ASIC style" register file that provides a full/dedicated hardware reset; [#736](https://github.com/stnolting/neorv32/pull/736) |
 | 23.11.2023 | 1.9.1.5 | clean-up & rework CPU branch logic; [#735](https://github.com/stnolting/neorv32/pull/735) |
 | 21.11.2023 | 1.9.1.4 | :bug: fix bug in handling of "misaligned instruction exception"; [#734](https://github.com/stnolting/neorv32/pull/734) |

rtl/core/mem/neorv32_imem.default.vhd

@@ -71,11 +71,11 @@ begin
   -- Sanity Checks --------------------------------------------------------------------------
   -- -------------------------------------------------------------------------------------------
   assert false report
-    "NEORV32 PROCESSOR CONFIG NOTE: Implementing DEFAULT processor-internal IMEM as " &
+    "[NEORV32] Implementing DEFAULT processor-internal IMEM as " &
     cond_sel_string_f(IMEM_AS_IROM, "pre-initialized ROM.", "blank RAM.") severity note;
 
   assert not ((IMEM_AS_IROM = true) and (imem_app_size_c > IMEM_SIZE)) report
-    "NEORV32 PROCESSOR CONFIG ERROR: Application (image = " & natural'image(imem_app_size_c) &
+    "[NEORV32] Application (image = " & natural'image(imem_app_size_c) &
     " bytes) does not fit into processor-internal IMEM (ROM = " & natural'image(IMEM_SIZE) & " bytes)!" severity error;
 
 

rtl/core/mem/neorv32_imem.legacy.vhd

@@ -71,11 +71,11 @@ begin
   -- Sanity Checks --------------------------------------------------------------------------
   -- -------------------------------------------------------------------------------------------
   assert false report
-    "NEORV32 PROCESSOR CONFIG NOTE: Implementing LEGACY processor-internal IMEM as " &
+    "[NEORV32] Implementing LEGACY processor-internal IMEM as " &
     cond_sel_string_f(IMEM_AS_IROM, "pre-initialized ROM.", "blank RAM.") severity note;
 
   assert not ((IMEM_AS_IROM = true) and (imem_app_size_c > IMEM_SIZE)) report
-    "NEORV32 PROCESSOR CONFIG ERROR: Application (image = " & natural'image(imem_app_size_c) &
+    "[NEORV32] Application (image = " & natural'image(imem_app_size_c) &
     " bytes) does not fit into processor-internal IMEM (ROM = " & natural'image(IMEM_SIZE) & " bytes)!" severity error;
 
 

rtl/core/neorv32_cpu.vhd

@@ -141,7 +141,7 @@ begin
   -- -------------------------------------------------------------------------------------------
   -- CPU ISA configuration --
   assert false report
-    "NEORV32 CPU Configuration: rv32" &
+    "[NEORV32] CPU ISA: rv32" &
     cond_sel_string_f(CPU_EXTENSION_RISCV_E,      "e",         "i") &
     cond_sel_string_f(CPU_EXTENSION_RISCV_M,      "m",         "" ) &
     cond_sel_string_f(CPU_EXTENSION_RISCV_A,      "a",         "" ) &
@@ -160,9 +160,17 @@ begin
     cond_sel_string_f(pmp_enable_c,               "_smpmp",    "" )
     severity note;
 
+  -- CPU tuning options --
+  assert false report
+    "[NEORV32] CPU tuning options: " &
+    cond_sel_string_f(FAST_MUL_EN,    "fast_mul ",   "") &
+    cond_sel_string_f(FAST_SHIFT_EN,  "fast_shift ", "" ) &
+    cond_sel_string_f(REGFILE_HW_RST, "rf_hw_rst",   "" )
+    severity note;
+
   -- simulation notifier --
   assert not (is_simulation_c = true) report
-    "NEORV32 CPU WARNING! Assuming this is a simulation." severity warning;
+    "[NEORV32] Assuming this is a simulation." severity warning;
 
 
   -- Control Unit ---------------------------------------------------------------------------

rtl/core/neorv32_cpu_cp_bitmanip.vhd

@@ -171,7 +171,7 @@ begin
   -- Sub-Extension Configuration ------------------------------------------------------------
   -- -------------------------------------------------------------------------------------------
   assert false report
-    "NEORV32 CPU: Implementing bit-manipulation (B) sub-extensions " &
+    "[NEORV32] Implementing bit-manipulation (B) sub-extensions " &
     cond_sel_string_f(zba_en_c, "Zba ", "") &
     cond_sel_string_f(zbb_en_c, "Zbb ", "") &
     cond_sel_string_f(zbc_en_c, "Zbc ", "") &

rtl/core/neorv32_cpu_cp_fpu.vhd

@@ -279,7 +279,7 @@ begin
   -- Sanity Checks --------------------------------------------------------------------------
   -- -------------------------------------------------------------------------------------------
   assert false report
-    "[Zfinx] The NEORV32 floating-point unit is still in experimental state." severity warning;
+    "[NEORV32] The floating-point unit (Zfinx) is still in experimental state." severity warning;
 
 
 -- ****************************************************************************************************************************

rtl/core/neorv32_cpu_pmp.vhd

@@ -42,7 +42,7 @@ use neorv32.neorv32_package.all;
 entity neorv32_cpu_pmp is
   generic (
     NUM_REGIONS : natural range 0 to 16; -- number of regions (0..16)
-    GRANULARITY : natural  -- minimal region granularity in bytes, has to be a power of 2, min 4 bytes
+    GRANULARITY : natural range 4 to natural'high -- minimal region granularity in bytes, has to be a power of 2, min 4 bytes
   );
   port (
     -- global control --
@@ -65,6 +65,10 @@ end neorv32_cpu_pmp;
 
 architecture neorv32_cpu_pmp_rtl of neorv32_cpu_pmp is
 
+  -- auto-configuration --
+  constant granularity_valid_c : boolean := is_power_of_two_f(GRANULARITY);
+  constant granularity_c       : natural := cond_sel_natural_f(granularity_valid_c, GRANULARITY, 2**index_size_f(GRANULARITY));
+
   -- PMP configuration register bits --
   constant cfg_r_c  : natural := 0; -- read permit
   constant cfg_w_c  : natural := 1; -- write permit
@@ -82,7 +86,7 @@ architecture neorv32_cpu_pmp_rtl of neorv32_cpu_pmp is
   constant mode_napot_c : std_ulogic_vector(1 downto 0) := "11"; -- naturally aligned power-of-two region (>= 8 bytes)
 
   -- PMP helpers --
-  constant pmp_lsb_c : natural := index_size_f(GRANULARITY); -- min = 2
+  constant pmp_lsb_c : natural := index_size_f(granularity_c); -- min = 2
 
   -- PMP CSRs --
   type csr_cfg_t      is array (0 to NUM_REGIONS-1) of std_ulogic_vector(7 downto 0);
@@ -133,10 +137,8 @@ begin
 
   -- Sanity Checks --------------------------------------------------------------------------
   -- -------------------------------------------------------------------------------------------
-  assert not (is_power_of_two_f(GRANULARITY) = false) report
-    "NEORV32 CPU CONFIG ERROR! PMP granularity has to be a power of two." severity error;
-  assert not (GRANULARITY < 4) report
-    "NEORV32 CPU CONFIG ERROR! PMP granularity has to be at least 4 bytes." severity error;
+  assert not (granularity_valid_c = false) report
+    "[NEORV32] Auto-adjusting invalid PMP granularity configuration." severity warning;
 
 
   -- CSR Write Access -----------------------------------------------------------------------
@@ -170,7 +172,7 @@ begin
           csr.cfg(i)(cfg_r_c) <= csr_wdata_i((i mod 4)*8+0); -- R (read)
           csr.cfg(i)(cfg_w_c) <= csr_wdata_i((i mod 4)*8+1); -- W (write)
           csr.cfg(i)(cfg_x_c) <= csr_wdata_i((i mod 4)*8+2); -- X (execute)
-          if (GRANULARITY > 4) and (csr_wdata_i((i mod 4)*8+4 downto (i mod 4)*8+3) = mode_na4_c) then
+          if (granularity_c > 4) and (csr_wdata_i((i mod 4)*8+4 downto (i mod 4)*8+3) = mode_na4_c) then
             csr.cfg(i)(cfg_ah_c downto cfg_al_c) <= mode_off_c; -- NA4 not available, fall back to OFF
           else
             csr.cfg(i)(cfg_ah_c downto cfg_al_c) <= csr_wdata_i((i mod 4)*8+4 downto (i mod 4)*8+3); -- A (mode)
@@ -221,11 +223,11 @@ begin
     begin
       addr_rd(i) <= (others => '0');
       addr_rd(i)(XLEN-1 downto pmp_lsb_c-2) <= csr.addr(i)(XLEN-1 downto pmp_lsb_c-2);
-      if (GRANULARITY = 8) then -- bit G-1 reads as zero in TOR or OFF mode
+      if (granularity_c = 8) then -- bit G-1 reads as zero in TOR or OFF mode
         if (csr.cfg(i)(cfg_ah_c) = '0') then -- TOR/OFF mode
           addr_rd(i)(pmp_lsb_c) <= '0';
         end if;
-      elsif (GRANULARITY > 8) then
+      elsif (granularity_c > 8) then
         addr_rd(i)(pmp_lsb_c-2 downto 0) <= (others => '1'); -- in NAPOT mode bits G-2:0 must read as one
         if (csr.cfg(i)(cfg_ah_c) = '0') then -- TOR/OFF mode
           addr_rd(i)(pmp_lsb_c-1 downto 0) <= (others => '0'); -- in TOR or OFF mode bits G-1:0 must read as zero

rtl/core/neorv32_dcache.vhd

@@ -61,8 +61,17 @@ end neorv32_dcache;
 
 architecture neorv32_dcache_rtl of neorv32_dcache is
 
+  -- make sure caches sizes are a power of two --
+  constant nblocks_valid_c : boolean := is_power_of_two_f(DCACHE_NUM_BLOCKS);
+  constant nblocks_pow2_c  : natural := 2**index_size_f(DCACHE_NUM_BLOCKS);
+  constant nblocks_c       : natural := cond_sel_natural_f(nblocks_valid_c, DCACHE_NUM_BLOCKS, nblocks_pow2_c);
+  --
+  constant block_size_valid_c : boolean := is_power_of_two_f(DCACHE_BLOCK_SIZE);
+  constant block_size_pow2_c  : natural := 2**index_size_f(DCACHE_BLOCK_SIZE);
+  constant block_size_c       : natural := cond_sel_natural_f(block_size_valid_c, DCACHE_BLOCK_SIZE, block_size_pow2_c);
+
   -- cache layout --
-  constant cache_offset_size_c : natural := index_size_f(DCACHE_BLOCK_SIZE/4); -- offset addresses full 32-bit words
+  constant cache_offset_size_c : natural := index_size_f(block_size_c/4); -- offset addresses full 32-bit words
 
   -- cache memory --
   component neorv32_dcache_memory
@@ -124,10 +133,8 @@ begin
 
   -- Sanity Checks --------------------------------------------------------------------------
   -- -------------------------------------------------------------------------------------------
-  assert not (is_power_of_two_f(DCACHE_NUM_BLOCKS) = false) report
-    "NEORV32 PROCESSOR CONFIG ERROR! d-cache number of blocks <DCACHE_NUM_BLOCKS> has to be a power of 2." severity error;
-  assert not (is_power_of_two_f(DCACHE_BLOCK_SIZE) = false) report
-    "NEORV32 PROCESSOR CONFIG ERROR! d-cache block size <DCACHE_BLOCK_SIZE> has to be a power of 2." severity error;
+  assert not ((nblocks_valid_c = false) or (block_size_valid_c = false)) report
+    "[NEORV32] Auto-adjusting invalid d-cache size configuration(s)." severity warning;
 
 
   -- Control Engine FSM Sync ----------------------------------------------------------------
@@ -314,8 +321,8 @@ begin
   -- -------------------------------------------------------------------------------------------
   neorv32_dcache_memory_inst: neorv32_dcache_memory
   generic map (
-    DCACHE_NUM_BLOCKS => DCACHE_NUM_BLOCKS,
-    DCACHE_BLOCK_SIZE => DCACHE_BLOCK_SIZE
+    DCACHE_NUM_BLOCKS => nblocks_c,
+    DCACHE_BLOCK_SIZE => block_size_c
   )
   port map (
     -- global control --

rtl/core/neorv32_debug_dm.vhd

@@ -224,8 +224,8 @@ begin
 
   -- Info -----------------------------------------------------------------------------------
   -- -------------------------------------------------------------------------------------------
-  assert not (LEGACY_MODE = true)  report "NEORV32 [OCD] on-chip debugger: DM compatible to debug spec. version 0.13" severity note;
-  assert not (LEGACY_MODE = false) report "NEORV32 [OCD] on-chip debugger: DM compatible to debug spec. version 1.0"  severity note;
+  assert not (LEGACY_MODE = true)  report "[NEORV32] OCD DM compatible to debug spec. version 0.13" severity note;
+  assert not (LEGACY_MODE = false) report "[NEORV32] OCD DM compatible to debug spec. version 1.0"  severity note;
 
 
   -- DMI Access -----------------------------------------------------------------------------

rtl/core/neorv32_icache.vhd

@@ -62,6 +62,15 @@ end neorv32_icache;
 
 architecture neorv32_icache_rtl of neorv32_icache is
 
+  -- make sure caches sizes are a power of two --
+  constant nblocks_valid_c : boolean := is_power_of_two_f(ICACHE_NUM_BLOCKS);
+  constant nblocks_pow2_c  : natural := 2**index_size_f(ICACHE_NUM_BLOCKS);
+  constant nblocks_c       : natural := cond_sel_natural_f(nblocks_valid_c, ICACHE_NUM_BLOCKS, nblocks_pow2_c);
+  --
+  constant block_size_valid_c : boolean := is_power_of_two_f(ICACHE_BLOCK_SIZE);
+  constant block_size_pow2_c  : natural := 2**index_size_f(ICACHE_BLOCK_SIZE);
+  constant block_size_c       : natural := cond_sel_natural_f(block_size_valid_c, ICACHE_BLOCK_SIZE, block_size_pow2_c);
+
   -- cache layout --
   constant cache_offset_size_c : natural := index_size_f(ICACHE_BLOCK_SIZE/4); -- offset addresses full 32-bit words
 
@@ -126,12 +135,8 @@ begin
 
   -- Sanity Checks --------------------------------------------------------------------------
   -- -------------------------------------------------------------------------------------------
-  assert not (is_power_of_two_f(ICACHE_NUM_BLOCKS) = false) report
-    "NEORV32 PROCESSOR CONFIG ERROR! i-cache number of blocks <ICACHE_NUM_BLOCKS> has to be a power of 2." severity error;
-  assert not (is_power_of_two_f(ICACHE_BLOCK_SIZE) = false) report
-    "NEORV32 PROCESSOR CONFIG ERROR! i-cache block size <ICACHE_BLOCK_SIZE> has to be a power of 2." severity error;
-  assert not ((is_power_of_two_f(ICACHE_NUM_SETS) = false)) report
-    "NEORV32 PROCESSOR CONFIG ERROR! i-cache associativity <ICACHE_NUM_SETS> has to be a power of 2." severity error;
+  assert not ((nblocks_valid_c = false) or (block_size_valid_c = false)) report
+    "[NEORV32] Auto-adjusting invalid i-cache size configuration(s)." severity warning;
 
 
   -- Control Engine FSM Sync ----------------------------------------------------------------
@@ -278,8 +283,8 @@ begin
   -- -------------------------------------------------------------------------------------------
   neorv32_icache_memory_inst: neorv32_icache_memory
   generic map (
-    ICACHE_NUM_BLOCKS => ICACHE_NUM_BLOCKS,
-    ICACHE_BLOCK_SIZE => ICACHE_BLOCK_SIZE,
+    ICACHE_NUM_BLOCKS => nblocks_c,
+    ICACHE_BLOCK_SIZE => block_size_c,
     ICACHE_NUM_SETS   => ICACHE_NUM_SETS
   )
   port map (

rtl/core/neorv32_intercon.vhd

@@ -670,7 +670,7 @@ use neorv32.neorv32_package.all;
 
 entity neorv32_bus_reservation_set is
   generic (
-    GRANULARITY : natural -- reservation set granularity in bytes; has to be power of 2, min 4
+    GRANULARITY : natural range 4 to natural'high -- reservation set granularity in bytes; has to be power of 2, min 4
   );
   port (
     -- global control --
@@ -691,8 +691,12 @@ end neorv32_bus_reservation_set;
 
 architecture neorv32_bus_reservation_set_rtl of neorv32_bus_reservation_set is
 
+  -- auto-configuration --
+  constant granularity_valid_c : boolean := is_power_of_two_f(GRANULARITY);
+  constant granularity_c       : natural := cond_sel_natural_f(granularity_valid_c, GRANULARITY, 2**index_size_f(GRANULARITY));
+
   -- reservation set granularity address boundary bit --
-  constant abb_c : natural := index_size_f(GRANULARITY);
+  constant abb_c : natural := index_size_f(granularity_c);
 
   -- reservation set --
   type rsvs_t is record
@@ -710,10 +714,8 @@ begin
 
   -- Sanity Checks --------------------------------------------------------------------------
   -- -------------------------------------------------------------------------------------------
-  assert not (is_power_of_two_f(GRANULARITY) = false) report
-    "NEORV32 PROCESSOR CONFIG ERROR: Reservation set granularity has to be a power of 2." severity error;
-  assert not (GRANULARITY < 4) report
-    "NEORV32 PROCESSOR CONFIG ERROR: Reservation set granularity has to be at least 4 bytes wide." severity error;
+  assert not (granularity_valid_c = false) report
+    "[NEORV32] Auto-adjusting invalid reservation set granularity configuration." severity warning;
 
 
   -- Reservation Set Control ----------------------------------------------------------------

rtl/core/neorv32_package.vhd

@@ -56,7 +56,7 @@ package neorv32_package is
 
   -- Architecture Constants -----------------------------------------------------------------
   -- -------------------------------------------------------------------------------------------
-  constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01090106"; -- hardware version
+  constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01090107"; -- hardware version
   constant archid_c     : natural := 19; -- official RISC-V architecture ID
   constant XLEN         : natural := 32; -- native data path width, do not change!
 

rtl/core/neorv32_top.vhd

@@ -348,7 +348,7 @@ begin
 
     -- show module configuration --
     assert false report
-      "NEORV32 Processor Configuration: " &
+      "[NEORV32] Processor Configuration: " &
       cond_sel_string_f(MEM_INT_IMEM_EN,     "IMEM ",     "") &
       cond_sel_string_f(MEM_INT_DMEM_EN,     "DMEM ",     "") &
       cond_sel_string_f(INT_BOOTLOADER_EN,   "BOOTROM ",  "") &
@@ -381,13 +381,11 @@ begin
 
     -- IMEM size --
     assert not ((imem_size_valid_c = false) and (MEM_INT_IMEM_EN = true)) report
-      "NEORV32 PROCESSOR CONFIG WARNING: Configured internal IMEM size (" & natural'image(MEM_INT_IMEM_SIZE) & " bytes) is not a power of two. " &
-      "Auto-adjusting memory size to the next power of two (" & natural'image(imem_size_c) & " bytes)" severity warning;
+      "[NEORV32] Auto-adjusting invalid IMEM size configuration." severity warning;
 
     -- DMEM size --
     assert not ((dmem_size_valid_c = false) and (MEM_INT_DMEM_EN = true)) report
-      "NEORV32 PROCESSOR CONFIG WARNING: Configured internal DMEM size (" & natural'image(MEM_INT_DMEM_SIZE) & " bytes) is not a power of two. " &
-      "Auto-adjusting memory size to the next power of two (" & natural'image(dmem_size_c) & " bytes)" severity warning;
+      "[NEORV32] Auto-adjusting invalid DMEM size configuration." severity warning;
 
   end generate; -- /sanity_checks
 

rtl/core/neorv32_wishbone.vhd

@@ -116,7 +116,7 @@ begin
   -- Configuration Info ---------------------------------------------------------------------
   -- -------------------------------------------------------------------------------------------
   assert false report
-    "NEORV32 PROCESSOR CONFIG NOTE: Ext. Bus Interface - " &
+    "[NEORV32] Ext. Bus Interface (WISHBONE) - " &
     cond_sel_string_f(PIPE_MODE, "PIPELINED", "CLASSIC/STANDARD") & " Wishbone protocol, " &
     cond_sel_string_f(boolean(BUS_TIMEOUT /= 0), "auto-timeout, ", "NO auto-timeout, ") &
     cond_sel_string_f(BIG_ENDIAN, "BIG", "LITTLE") & "-endian byte order, " &
@@ -126,11 +126,11 @@ begin
 
   -- async RX override warning --
   assert not ((ASYNC_RX = true) and (async_rx_c = false)) report
-    "NEORV32 PROCESSOR CONFIG WARNING! Ext. Bus Interface - Non-pipelined/standard mode requires sync RX (auto-disabling async RX)." severity warning;
+    "[NEORV32] Ext. Bus Interface - Non-pipelined/standard mode requires sync RX (auto-disabling async RX)." severity warning;
 
   -- zero timeout warning --
   assert not (BUS_TIMEOUT = 0) report
-    "NEORV32 PROCESSOR CONFIG WARNING! Ext. Bus Interface - NO auto-timeout defined; can cause permanent CPU stall!" severity warning;
+    "[NEORV32] Ext. Bus Interface - NO auto-timeout defined; can cause permanent CPU stall!" severity warning;
 
 
   -- Bus Arbiter -----------------------------------------------------------------------------