Support LinkMode::Alias.

sisshiki1969 · Jan 3, 2024 · fe0f0cf · fe0f0cf
1 parent f8e96e8
commit fe0f0cf
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Showing 6 changed files with 242 additions and 31 deletions.
diff --git a/emit.sh b/emit.sh
@@ -8,6 +8,7 @@ ruby benchmark/tarai.rb
 target/release/monoruby benchmark/app_aobench.rb 2> benchmark/aobench.disas > /dev/null
 target/release/monoruby benchmark/so_mandelbrot.rb 2> benchmark/mandel.disas > /dev/null
 target/release/monoruby benchmark/binarytrees.rb 2> benchmark/binarytrees.disas
+target/release/monoruby benchmark/quick_sort.rb 2> benchmark/quick_sort.disas
 target/release/monoruby benchmark/so_nbody.rb 2> benchmark/so_nbody.disas
 ruby benchmark/so_nbody.rb
 target/release/monoruby ../optcarrot/bin/optcarrot -b ../optcarrot/examples/Lan_Master.nes 2> benchmark/optcarrot.disas > /dev/null
@@ -19,6 +20,7 @@ target/release/monoruby benchmark/tarai.rb 2> benchmark/tarai.bytecode > /dev/nu
 target/release/monoruby benchmark/app_aobench.rb 2> benchmark/aobench.bytecode > /dev/null
 target/release/monoruby benchmark/so_mandelbrot.rb 2> benchmark/mandel.bytecode > /dev/null
 target/release/monoruby benchmark/binarytrees.rb 2> benchmark/binarytrees.bytecode
+target/release/monoruby benchmark/quick_sort.rb 2> benchmark/quick_sort.bytecode
 target/release/monoruby benchmark/so_nbody.rb 2> benchmark/so_nbody.bytecode > /dev/null
 target/release/monoruby ../optcarrot/bin/optcarrot -b ../optcarrot/examples/Lan_Master.nes 2> benchmark/optcarrot.bytecode > /dev/null
 

diff --git a/monoruby/src/compiler/jitgen.rs b/monoruby/src/compiler/jitgen.rs
@@ -871,16 +871,23 @@ pub(crate) fn conv(reg: SlotId) -> i64 {
 pub(crate) struct WriteBack {
     xmm: Vec<(Xmm, Vec<SlotId>)>,
     literal: Vec<(Value, SlotId)>,
+    alias: Vec<(SlotId, Vec<SlotId>)>,
     r15: Option<SlotId>,
 }
 
 impl WriteBack {
     fn new(
         xmm: Vec<(Xmm, Vec<SlotId>)>,
         literal: Vec<(Value, SlotId)>,
+        alias: Vec<(SlotId, Vec<SlotId>)>,
         r15: Option<SlotId>,
     ) -> Self {
-        Self { xmm, literal, r15 }
+        Self {
+            xmm,
+            literal,
+            alias,
+            r15,
+        }
     }
 }
 
@@ -961,34 +968,37 @@ impl BBContext {
         }
     }
 
-    fn is_array_ty(&mut self, slot: SlotId) -> bool {
+    fn is_array_ty(&self, slot: SlotId) -> bool {
         match self[slot] {
             LinkMode::Xmm(_) => false,
             LinkMode::Literal(v) => v.is_array_ty(),
             LinkMode::Both(_) | LinkMode::Stack => false,
             LinkMode::R15 => false,
+            LinkMode::Alias(origin) => self.is_array_ty(origin),
         }
     }
 
-    fn is_fixnum(&mut self, slot: SlotId) -> bool {
+    fn is_fixnum(&self, slot: SlotId) -> bool {
         match self[slot] {
             LinkMode::Xmm(_) => false,
             LinkMode::Literal(v) => v.is_fixnum(),
             LinkMode::Both(_) | LinkMode::Stack => false,
             LinkMode::R15 => false,
+            LinkMode::Alias(origin) => self.is_fixnum(origin),
         }
     }
 
-    fn is_float(&mut self, slot: SlotId) -> bool {
+    fn is_float(&self, slot: SlotId) -> bool {
         match self[slot] {
             LinkMode::Xmm(_) => true,
             LinkMode::Literal(v) => v.is_float(),
             LinkMode::Both(_) | LinkMode::Stack => false,
             LinkMode::R15 => false,
+            LinkMode::Alias(origin) => self.is_float(origin),
         }
     }
 
-    fn is_class(&mut self, slot: SlotId, class: ClassId) -> bool {
+    fn is_class(&self, slot: SlotId, class: ClassId) -> bool {
         match class {
             INTEGER_CLASS => self.is_fixnum(slot),
             FLOAT_CLASS => self.is_float(slot),
@@ -997,6 +1007,7 @@ impl BBContext {
                 LinkMode::Literal(v) => v.class() == class,
                 LinkMode::Both(_) | LinkMode::Stack => false,
                 LinkMode::R15 => false,
+                LinkMode::Alias(origin) => self.is_class(origin, class),
             },
         }
     }
@@ -1050,6 +1061,10 @@ pub(crate) enum LinkMode {
     ///
     Stack,
     ///
+    /// Alias of *SlotId*.
+    ///
+    Alias(SlotId),
+    ///
     /// Literal.
     ///
     Literal(Value),
@@ -1328,6 +1343,14 @@ impl Codegen {
         if let Some(slot) = wb.r15 {
             self.store_r15(slot);
         }
+        for (origin, v) in &wb.alias {
+            if !v.is_empty() {
+                self.load_rax(*origin);
+                for reg in v {
+                    self.store_rax(*reg);
+                }
+            }
+        }
     }
 
     ///

diff --git a/monoruby/src/compiler/jitgen/asmir.rs b/monoruby/src/compiler/jitgen/asmir.rs
@@ -1216,6 +1216,7 @@ pub(crate) enum GP {
     Rsp = 4,
     Rsi = 6,
     Rdi = 7,
+    R8 = 8,
     R13 = 13,
     R15 = 15,
 }

diff --git a/monoruby/src/compiler/jitgen/asmir/merge.rs b/monoruby/src/compiler/jitgen/asmir/merge.rs
@@ -80,7 +80,7 @@ impl JitContext {
         let mut const_vec = vec![];
         for (reg, coerced) in use_set {
             match target[reg] {
-                LinkMode::Stack | LinkMode::R15 => {}
+                LinkMode::Stack => {}
                 LinkMode::Literal(v) => {
                     if v.is_float() {
                         const_vec.push(reg);
@@ -92,6 +92,7 @@ impl JitContext {
                 LinkMode::Both(r) | LinkMode::Xmm(r) => {
                     self.ir.link_both(&mut bb, reg, r);
                 }
+                LinkMode::R15 | LinkMode::Alias(_) => unreachable!(),
             };
         }
         for r in const_vec {
@@ -189,6 +190,7 @@ impl AsmIr {
         let len = bb.reg_num();
 
         self.writeback_acc(&mut bb);
+        self.writeback_alias(&mut bb);
 
         for i in 0..len {
             let reg = SlotId(i as u16);
@@ -202,7 +204,7 @@ impl AsmIr {
                         self.lit2stack(v, reg);
                     }
                     LinkMode::Both(_) | LinkMode::Stack => {}
-                    LinkMode::R15 => unreachable!(),
+                    LinkMode::R15 | LinkMode::Alias(_) => unreachable!("{:?} ", reg),
                 }
                 self.link_stack(&mut bb, reg);
             };

diff --git a/monoruby/src/compiler/jitgen/asmir/read_slot.rs b/monoruby/src/compiler/jitgen/asmir/read_slot.rs
@@ -31,6 +31,10 @@ impl AsmIr {
     /// ### destroy
     /// - rax, rcx
     pub(crate) fn write_back_slot(&mut self, bb: &mut BBContext, reg: SlotId) {
+        if reg >= bb.sp {
+            eprintln!("warning: {:?} >= {:?} in fetch_slot()", reg, bb.sp);
+            panic!();
+        };
         if reg >= bb.sp {
             eprintln!("warning: {:?} >= {:?} in fetch_slot()", reg, bb.sp);
             panic!();
@@ -48,6 +52,11 @@ impl AsmIr {
                 self.link_stack(bb, reg);
                 self.acc2stack(reg);
             }
+            LinkMode::Alias(origin) => {
+                self.link_stack(bb, reg);
+                self.stack2reg(origin, GP::Rax);
+                self.reg2stack(GP::Rax, reg);
+            }
             LinkMode::Both(_) | LinkMode::Stack => {}
         }
     }
@@ -110,6 +119,9 @@ impl AsmIr {
                 }
                 self.stack2reg(reg, dst);
             }
+            LinkMode::Alias(origin) => {
+                self.stack2reg(origin, dst);
+            }
             LinkMode::R15 => {
                 self.reg_move(GP::R15, dst);
             }
@@ -135,6 +147,10 @@ impl AsmIr {
                 self.stack2reg(reg, GP::Rax);
                 self.reg2rsp_offset(GP::Rax, offset);
             }
+            LinkMode::Alias(origin) => {
+                self.stack2reg(origin, GP::Rax);
+                self.reg2rsp_offset(GP::Rax, offset);
+            }
             LinkMode::R15 => {
                 self.reg2rsp_offset(GP::R15, offset);
             }
@@ -162,6 +178,12 @@ impl AsmIr {
                 }
                 self.stack2reg(slot, r);
             }
+            LinkMode::Alias(origin) => {
+                if r == GP::R15 {
+                    self.writeback_acc(bb);
+                }
+                self.stack2reg(origin, r);
+            }
             LinkMode::R15 => {
                 self.reg_move(GP::R15, r);
             }
@@ -232,6 +254,13 @@ impl AsmIr {
                 self.int2xmm(GP::R15, x, deopt);
                 x
             }
+            LinkMode::Alias(origin) => {
+                // -> Both
+                let x = self.link_new_both(bb, origin);
+                self.stack2reg(origin, GP::Rdi);
+                self.int2xmm(GP::Rdi, x, deopt);
+                x
+            }
             LinkMode::Literal(v) => {
                 if let Some(f) = v.try_float() {
                     // -> Xmm
@@ -279,6 +308,13 @@ impl AsmIr {
                 self.float2xmm(GP::R15, x, deopt);
                 x
             }
+            LinkMode::Alias(origin) => {
+                // -> Both
+                let x = self.link_new_both(bb, origin);
+                self.stack2reg(origin, GP::Rdi);
+                self.float2xmm(GP::Rdi, x, deopt);
+                x
+            }
             LinkMode::Literal(v) => {
                 if let Some(f) = v.try_float() {
                     // -> Xmm