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Refactor.
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@sisshiki1969
sisshiki1969 committed Jan 2, 2024
1 parent 43347a8 commit f8e96e8
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Showing 5 changed files with 83 additions and 60 deletions.
34 changes: 4 additions & 30 deletions monoruby/src/compiler/jitgen.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -618,7 +618,7 @@ impl JitContext {
}
}
TraceIr::Mov(dst, src) => {
bb.copy_slot(&mut self.ir, src, dst);
self.ir.copy_slot(bb, src, dst);
}
TraceIr::ConcatStr(dst, arg, len) => {
self.ir.write_back_range(bb, arg, len);
Expand Down Expand Up @@ -925,8 +925,8 @@ impl BBContext {
self.slot_state.len()
}

fn merge_entries(entries: &[BranchEntry]) -> asmir::slot::MergeContext {
let mut merge_ctx = asmir::slot::MergeContext::new(&entries.last().unwrap().bb);
fn merge_entries(entries: &[BranchEntry]) -> MergeContext {
let mut merge_ctx = MergeContext::new(&entries.last().unwrap().bb);
for BranchEntry {
src_idx: _src_idx,
bb,
Expand Down Expand Up @@ -982,7 +982,7 @@ impl BBContext {
fn is_float(&mut self, slot: SlotId) -> bool {
match self[slot] {
LinkMode::Xmm(_) => true,
LinkMode::Literal(v) => matches!(v.unpack(), RV::Float(_)),
LinkMode::Literal(v) => v.is_float(),
LinkMode::Both(_) | LinkMode::Stack => false,
LinkMode::R15 => false,
}
Expand Down Expand Up @@ -1416,29 +1416,3 @@ impl Codegen {
self.jit.select_page(0);
}
}

impl BBContext {
///
/// Copy *src* to *dst*.
///
fn copy_slot(&mut self, ir: &mut AsmIr, src: SlotId, dst: SlotId) {
match self[src] {
LinkMode::Xmm(x) | LinkMode::Both(x) => {
ir.link_xmm(self, dst, x);
}
LinkMode::Stack => {
ir.link_stack(self, dst);
ir.stack2reg(src, GP::Rax);
ir.reg2stack(GP::Rax, dst);
}
LinkMode::Literal(v) => {
ir.link_literal(self, dst, v);
}
LinkMode::R15 => {
ir.reg2stack(GP::R15, src);
ir.link_stack(self, src);
ir.link_r15(self, dst);
}
}
}
}
8 changes: 8 additions & 0 deletions monoruby/src/compiler/jitgen/asmir.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -1227,15 +1227,20 @@ pub(super) enum SideExit {

impl Codegen {
pub(super) fn gen_code(&mut self, store: &Store, ctx: &mut JitContext) {
// generate machine code for a main math
self.gen_asm(store, ctx, None, None);

// generate machinwe code for bridges
for (ir, entry, exit) in std::mem::take(&mut ctx.bridges) {
ctx.ir = ir;
self.gen_asm(store, ctx, Some(entry), Some(exit));
}
assert!(ctx.continuation_bridge.is_none());
}

///
/// Generate machine code for *ctx.ir*.
///
fn gen_asm(
&mut self,
store: &Store,
Expand Down Expand Up @@ -1291,6 +1296,9 @@ impl Codegen {
}
}

///
/// Generate machine code for *inst*.
///
fn gen_asmir(
&mut self,
store: &Store,
Expand Down
44 changes: 28 additions & 16 deletions monoruby/src/compiler/jitgen/asmir/merge.rs
View file
Original file line number Diff line number Diff line change
Expand Up @@ -45,6 +45,21 @@ impl JitContext {
Some(res)
}

///
///
/// ```text
/// +------------+
/// entries | bb |
/// +------------+
/// \ | / |
/// \ | / +-------------+
/// v v v v
/// +------------+
/// | target |
/// +------------+
/// |
/// ```
///
fn incoming_context_loop(&mut self, func: &ISeqInfo, bb_pos: BcIndex) -> Option<BBContext> {
let entries = self.branch_map.remove(&bb_pos)?;
let pc = func.get_pc(bb_pos);
Expand All @@ -59,47 +74,44 @@ impl JitContext {
eprintln!(" not used: {:?}", unused);
}

let template = BBContext::merge_entries(&entries);
let target = BBContext::merge_entries(&entries);

let mut target_ctx = BBContext::new(&self);
let mut bb = BBContext::new(&self);
let mut const_vec = vec![];
for (reg, coerced) in use_set {
match template[reg] {
match target[reg] {
LinkMode::Stack | LinkMode::R15 => {}
LinkMode::Literal(v) => {
if v.class() == FLOAT_CLASS {
if v.is_float() {
const_vec.push(reg);
}
}
LinkMode::Xmm(r) if !coerced => {
self.ir.link_xmm(&mut target_ctx, reg, r);
self.ir.link_xmm(&mut bb, reg, r);
}
LinkMode::Both(r) | LinkMode::Xmm(r) => {
self.ir.link_both(&mut target_ctx, reg, r);
self.ir.link_both(&mut bb, reg, r);
}
};
}
for r in const_vec {
self.ir.link_new_xmm(&mut target_ctx, r);
self.ir.link_new_xmm(&mut bb, r);
}
#[cfg(feature = "jit-debug")]
eprintln!(
" target_ctx:[{:?}] {:?}",
target_ctx.sp, target_ctx.slot_state
);
eprintln!(" target_ctx:[{:?}] {:?}", bb.sp, bb.slot_state);

self.write_back_branches(
&MergeContext::new(&target_ctx),
&MergeContext::new(&bb),
entries,
cur_label,
pc + 1,
bb_pos,
&unused,
);

self.new_backedge(func, &mut target_ctx, bb_pos, cur_label, unused);
self.new_backedge(func, &mut bb, bb_pos, cur_label, unused);

Some(target_ctx)
Some(bb)
}

fn incoming_context_method(&mut self, func: &ISeqInfo, bb_pos: BcIndex) -> Option<BBContext> {
Expand All @@ -123,7 +135,7 @@ impl JitContext {

fn write_back_branches(
&mut self,
target_bb: &super::slot::MergeContext,
target_bb: &MergeContext,
entries: Vec<BranchEntry>,
cur_label: DestLabel,
pc: BcPc,
Expand Down Expand Up @@ -166,7 +178,7 @@ impl AsmIr {
pub(in crate::compiler::jitgen) fn write_back_for_target(
&mut self,
mut bb: BBContext,
target: &super::slot::MergeContext,
target: &MergeContext,
pc: BcPc,
) {
#[cfg(feature = "jit-debug")]
Expand Down
53 changes: 39 additions & 14 deletions monoruby/src/compiler/jitgen/asmir/slot.rs
View file
Original file line number Diff line number Diff line change
Expand Up @@ -15,12 +15,12 @@ impl std::fmt::Debug for SlotState {
.slots
.iter()
.enumerate()
.flat_map(|(i, mode)| match mode {
LinkMode::Stack => None,
LinkMode::Literal(v) => Some(format!("%{i}:Literal({:?}) ", v)),
LinkMode::Both(x) => Some(format!("%{i}:Both({x:?}) ")),
LinkMode::Xmm(x) => Some(format!("%{i}:Xmm({x:?}) ")),
LinkMode::R15 => Some(format!("%{i}:R15 ")),
.map(|(i, mode)| match mode {
LinkMode::Stack => format!("%{i}:Stack ",),
LinkMode::Literal(v) => format!("%{i}:Literal({:?}) ", v),
LinkMode::Both(x) => format!("%{i}:Both({x:?}) "),
LinkMode::Xmm(x) => format!("%{i}:Xmm({x:?}) "),
LinkMode::R15 => format!("%{i}:R15 "),
})
.collect();
write!(f, "[{s}]")
Expand Down Expand Up @@ -322,6 +322,35 @@ impl AsmIr {
res
}

///
/// Copy *src* to *dst*.
///
pub(in crate::compiler::jitgen) fn copy_slot(
&mut self,
bb: &mut BBContext,
src: SlotId,
dst: SlotId,
) {
match bb[src] {
LinkMode::Xmm(x) | LinkMode::Both(x) => {
self.link_xmm(bb, dst, x);
}
LinkMode::Stack => {
self.link_stack(bb, dst);
self.stack2reg(src, GP::Rax);
self.reg2stack(GP::Rax, dst);
}
LinkMode::Literal(v) => {
self.link_literal(bb, dst, v);
}
LinkMode::R15 => {
self.reg2stack(GP::R15, src);
self.link_stack(bb, src);
self.link_r15(bb, dst);
}
}
}

///
/// Allocate new xmm register to the slot *reg* for read/write f64.
///
Expand Down Expand Up @@ -385,17 +414,13 @@ impl MergeContext {
match (&self[i], &other[i]) {
(LinkMode::Both(l), LinkMode::Both(_) | LinkMode::Xmm(_))
| (LinkMode::Xmm(l), LinkMode::Both(_)) => self.link_both(i, *l),
(LinkMode::Both(l), LinkMode::Literal(r)) if r.class() == FLOAT_CLASS => {
self.link_both(i, *l)
}
(LinkMode::Literal(l), LinkMode::Both(_)) if l.class() == FLOAT_CLASS => {
(LinkMode::Both(l), LinkMode::Literal(r)) if r.is_float() => self.link_both(i, *l),
(LinkMode::Literal(l), LinkMode::Both(_)) if l.is_float() => {
self.link_new_both(i);
}
(LinkMode::Xmm(l), LinkMode::Xmm(_)) => self.link_xmm(i, *l),
(LinkMode::Xmm(l), LinkMode::Literal(r)) if r.class() == FLOAT_CLASS => {
self.link_xmm(i, *l)
}
(LinkMode::Literal(l), LinkMode::Xmm(_)) if l.class() == FLOAT_CLASS => {
(LinkMode::Xmm(l), LinkMode::Literal(r)) if r.is_float() => self.link_xmm(i, *l),
(LinkMode::Literal(l), LinkMode::Xmm(_)) if l.is_float() => {
self.link_new_xmm(i);
}
(LinkMode::Literal(l), LinkMode::Literal(r)) if l == r => self.link_literal(i, *l),
Expand Down
4 changes: 4 additions & 0 deletions monoruby/src/value.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -455,6 +455,10 @@ impl Value {
}
}

pub(crate) fn is_float(&self) -> bool {
self.class() == FLOAT_CLASS
}

fn is_flonum(&self) -> bool {
self.0.get() & 0b11 == 2
}
Expand Down

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