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The
sqrdmulh
followed by asqadd
is only optimized intosqrdmlah
when the rdm target feature is enabled. I believe this is actually an incorrect optimization in LLVM though. However this patch will cause the correct instruction for the intrinsic, and I couldn't see another way to generate this instruction.For instance using
a = 0x80000000, b = 0x80000000, c = 0x80000000
sqrdmlah
would be0
whereas thesqrdmulh
sqadd
sequence would be-1