Patch RT1060x registers

[Akari202]

I tried to fix #36 and and I added the missing FILT_PRSC that i encountered. I did'nt know if these patches also should apply to the other chips so i only added them to the rt106x chips.

I have never done this kinda thing before so feel free to let me know what i messed up but i think everything should be correct.

[mciantyre]

Thanks for jumping in. Looks like a good start, and we can build on it with some small patches.

• I updated Missing register field - FlexSPI - MCR0 - SERCLKDIV #36 to describe all MCUs missing the SERCLKDIV field. There's more than just the 1060, and it would be helpful to fix all affected parts in one go.
• Based on the reference manuals I have available, the ENC change also affects the 1021.
• Check in the generated Rust code. Without this, a CI check fails. See the contributing doc to learn about the workflow.

[Finomnis]

Minor nit: don't check in files without newline termination; most IDEs have an option to correct this automatically.

In VSCode, for example, the relevant settings are:

"files.trimTrailingWhitespace": true,
"files.trimFinalNewlines": true,
"files.insertFinalNewline": true,

[Akari202]

The 1011 and 1176 SVDs are not affected. This field is marked as "reserved" in an older 1015 reference manual. Download the latest RM and double check this once NXP's website exits maintenance mode...

Checking the reference manuals this change does effect the 1015. Now that NXP's website is finally back i have checked these registers for all the chips supported by this ral and everything should be properly applied now. I also checked in the generated code so the CI checks should be able to run properly this time

[mciantyre]

Looks great. Thanks for making these changes throughout all supported chips. I'll release this in the 0.5 series.