Lot of discoveries and refactoring

[giuliof]

The schematic is almost completed, but a review is needed after this big step. See the attached PDF file to compare pre and post-refactoring.
Found answers to #1 #3 and #4.

Only the floppy drive controller is still messy and incomplete, but at the moment I am not interested in that part of circuit and its description can be delayed. Anyhow, some parts are already mapped.

Other things to be done, not included in these commits:

• Rename all components using the Uxy naming convention, where xy is the component's coordinate on the board.
• Rename wires where is needed.

pre-refactoring.pdf
post-refactoring.pdf

[giomba]

Video Generation:

• you left a "Dot Pattern" text label not connected in the middle of the page
• I think "Character Line Index" is not readable, because of the vertical orientation and the strike-through of the bus; maybe rotating it horizontally would be better?

Serial:

• there are two labels with text "188" and "189", near the SIO/2 chip: I don't understand what these stand for; can you elaborate?
• there also is an Italinglish label "da verifixare", but I think it's ok :-)

IO Space:

• I don't a way to check, but I remember that you told me that some of the wires near Big and Small I/O had been accidentally inverter; have you fixed them? If not, I think that it would be ok if you just put a TODO nearby, for this merge request

Z80CPU:

• there is an resistors network on its own, which has not been wired, top left; what's this? Hint: maybe it accidentally leaked from the next page? (GPIO)

Daughterboard:

• it just looks like a spaghetti schematics, I think it's difficult to follow, it's really awful (I can say this because I did this part :-) Any way we could improve the readability?

Main Memory Management:

• there is a TODO label next to "bank0", but then there is also written that is has been "verified with multimeter": so, it's something that needs to be done? Or has it been confirmed? Maybe a better description of what have been done, and what needs to be done, can be written?

Video Memory:

• there is a blue label over chip in H8/H10 that denotes it as the "Video RAM". Maybe a similar label can be added to the other chip in J8/J10 to make it clear that it is the "Video attribute RAM"?

Apart from these things, the rest looks good. 👍

[giomba]

Further: there are several commits which read as "WIP about this": maybe you can just squash all of them together

[giuliof]

Video Generation:

* you left a "Dot Pattern" text label not connected in the middle of the page

Fixed. I have to reposition all the floating notes in a more ordered manner.
I left this in a second stage refactoring operation, together with parts reference (re)assignment.

* I think "Character Line Index" is not readable, because of the vertical orientation and the strike-through of the bus; maybe rotating it horizontally would be better?

Fixed

* there are two labels with text "188" and "189", near the SIO/2 chip: I don't understand what these stand for; can you elaborate?

Removed. Just notes to know which chip was connected to which inout signal.

* there also is an Italinglish label "da verifixare", but I think it's ok :-)

Removed

IO Space:

* I don't a way to check, but I remember that you told me that some of the wires near Big and Small I/O had been accidentally inverter; have you fixed them? If not, I think that it would be ok if you just put a TODO nearby, for this merge request

Already did this.

Z80CPU:

* there is an resistors network on its own, which has not been wired, top left; what's this? Hint: maybe it accidentally leaked from the next page? (GPIO)

It is used for Z80 signals coming out from the buffer. Left as a placeholder, I will wire it soon, but not in this PR.

Daughterboard:

* it just looks like a spaghetti schematics, I think it's difficult to follow, it's really awful (I can say this because I did this part :-) Any way we could improve the readability?

TODO, but not in this PR.
I would remove all the spaghetti wires and just use local labels.
I/We will do this in a refactoring commit including a full labels review. At the moment the wire labels are not very consistent. We can look around on other old schematics and follow a common rule, if there is one. Then, find-and-replace all over the schematic.

Main Memory Management:

* there is a TODO label next to "bank0", but then there is also written that is has been "verified with multimeter": so, it's something that needs to be done? Or has it been confirmed? Maybe a better description of what have been done, and what needs to be done, can be written?

Already verified, removed.

Video Memory:

* there is a blue label over chip in H8/H10 that denotes it as the "Video RAM". Maybe a similar label can be added to the other chip in J8/J10 to make it clear that it is the "Video attribute RAM"?

Done

[giomba]

I suggest creating follow-up issues to remember what TODO next time. Is there a way to to this automatically with Github? I'm more used to Gitlab

[giuliof]

I suggest creating follow-up issues to remember what TODO next time. Is there a way to to this automatically with Github? I'm more used to Gitlab

I will create some issues