arch: nxp_kinetis: initial import KW2XD SiP

Jira: ZEP-1471

Signed-off-by: Johann Fischer <[email protected]>

arch/arm/soc/nxp_kinetis/kwx/Kconfig.defconfig.mkw2xd512

@@ -0,0 +1,96 @@
+# Kconfig - Kinetis KW2xD SoC configuration options
+#
+# Copyright (c) 2017, Phytec Messtechnik GmbH
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+if SOC_MKW22D5 || SOC_MKW24D5
+
+if SOC_MKW22D5
+
+config SOC
+	string
+	default mkw22d5
+
+endif # SOC_MKW22D5
+
+if SOC_MKW24D5
+
+config SOC
+	string
+	default mkw24d5
+
+endif # SOC_MKW24D5
+
+config NUM_IRQS
+	int
+	default 65
+
+if ADC
+
+config ADC_MCUX_ADC16
+	def_bool y
+
+endif # ADC
+
+if PINMUX
+
+config PINMUX_MCUX
+	def_bool y
+
+endif # PINMUX
+
+if GPIO
+
+config GPIO_MCUX
+	def_bool y
+
+endif # GPIO
+
+if I2C
+
+config I2C_MCUX
+	def_bool y
+
+endif # I2C
+
+config SPI
+	def_bool y
+
+if PWM
+
+config PWM_MCUX_FTM
+	def_bool y
+
+endif # PWM
+
+if SPI
+
+config SPI_MCUX_DSPI
+	def_bool y
+
+endif # SPI
+
+if RANDOM_GENERATOR
+
+config RANDOM_MCUX_RNGA
+	def_bool y
+
+endif # RANDOM_GENERATOR
+
+if FLASH
+
+config SOC_FLASH_MCUX
+	def_bool y
+
+endif # FLASH
+
+if SERIAL
+
+config UART_MCUX
+	def_bool y
+
+endif # SERIAL
+
+endif # SOC_MKW2xD512

arch/arm/soc/nxp_kinetis/kwx/Kconfig.soc

@@ -9,6 +9,27 @@ choice
 prompt "Kinetis KWx MCU Selection"
 depends on SOC_SERIES_KINETIS_KWX
 
+config SOC_MKW22D5
+	bool "SOC_MKW22D5"
+	select CPU_CORTEX_M4
+	select HAS_MCUX
+	select HAS_MCUX_ADC16
+	select HAS_MCUX_FTM
+	select HAS_MCUX_RNGA
+	select HAS_OSC
+	select HAS_MCG
+
+config SOC_MKW24D5
+	bool "SOC_MKW24D5"
+	select CPU_CORTEX_M4
+	select HAS_MCUX
+	select HAS_MCUX_ADC16
+	select HAS_MCUX_FTM
+	select HAS_MCUX_RNGA
+	select HAS_OSC
+	select HAS_MCG
+	select HAS_SEGGER_RTT
+
 config SOC_MKW40Z4
 	bool "SOC_MKW40Z4"
 	select CPU_CORTEX_M0PLUS
@@ -34,6 +55,12 @@ endchoice
 
 if SOC_SERIES_KINETIS_KWX
 
+config SOC_PART_NUMBER_MKW22D512VHA5
+	bool
+
+config SOC_PART_NUMBER_MKW24D512VHA5
+	bool
+
 config SOC_PART_NUMBER_MKW40Z160VHT4
 	bool
 
@@ -45,6 +72,8 @@ config SOC_PART_NUMBER_MKW41Z512VHT4
 
 config SOC_PART_NUMBER_KINETIS_KWX
 	string
+	default "MKW22D512VHA5" if SOC_PART_NUMBER_MKW22D512VHA5
+	default "MKW24D512VHA5" if SOC_PART_NUMBER_MKW24D512VHA5
 	default "MKW40Z160VHT4" if SOC_PART_NUMBER_MKW40Z160VHT4
 	default "MKW41Z256VHT4" if SOC_PART_NUMBER_MKW41Z256VHT4
 	default "MKW41Z512VHT4" if SOC_PART_NUMBER_MKW41Z512VHT4
@@ -53,4 +82,40 @@ config SOC_PART_NUMBER_KINETIS_KWX
 	  that you should not set directly. The part number selection choice defines
 	  the default value for this string.
 
+if SOC_MKW24D5 || SOC_MKW22D5
+
+config KW2XD_CORE_CLOCK_DIVIDER
+	int
+	prompt "KW2xD core clock divider"
+	default 1
+	help
+	  This option specifies the divide value for the KW2xD processor core
+	  clock from the system clock.
+
+config KW2XD_BUS_CLOCK_DIVIDER
+	int
+	prompt "KW2xD bus clock divider"
+	default 1
+	help
+	  This option specifies the divide value for the KW2xD bus clock from
+	  the system clock.
+
+config KW2XD_FLASH_CLOCK_DIVIDER
+	int
+	prompt "KW2xD flash clock divider"
+	default 2
+	help
+	  This option specifies the divide value for the KW2xD flash clock from
+	  the system clock.
+
+config WDOG_INIT
+	def_bool y
+	# omit prompt to signify a "hidden" option
+	help
+	  This processor enables the watchdog timer with a short timeout
+	  upon reset. Therefore, this requires that the watchdog be configured
+	  during reset handling.
+
+endif # SOC_MKW24D5 || SOC_MKW22D5
+
 endif # SOC_SERIES_KINETIS_KWX

arch/arm/soc/nxp_kinetis/kwx/Makefile

@@ -5,4 +5,7 @@
 # SPDX-License-Identifier: Apache-2.0
 #
 
-obj-y += soc.o
+obj-$(CONFIG_SOC_MKW24D5) += wdog.o soc_kw2xd.o
+obj-$(CONFIG_SOC_MKW22D5) += wdog.o soc_kw2xd.o
+obj-$(CONFIG_SOC_MKW41Z4) += soc_kw4xz.o
+obj-$(CONFIG_SOC_MKW40Z4) += soc_kw4xz.o

arch/arm/soc/nxp_kinetis/kwx/soc.h

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2017, NXP
+ * Copyright (c) 2017, Phytec Messtechnik GmbH
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -13,6 +14,8 @@
 extern "C" {
 #endif
 
+#if defined(CONFIG_SOC_MKW40Z4) || defined(CONFIG_SOC_MKW41Z4)
+
 #define LPUART0_CLK_SRC kCLOCK_CoreSysClk
 
 /* IRQs */
@@ -50,8 +53,78 @@ extern "C" {
 #define IRQ_GPIO_PORTB 31
 #define IRQ_GPIO_PORTC 31
 
+#endif
+
+#if defined(CONFIG_SOC_MKW22D5) || defined(CONFIG_SOC_MKW24D5)
+
+#define PERIPH_ADDR_BASE_WDOG 0x40052000 /* Watchdog Timer module */
+
+/* IRQs */
+#define IRQ_DMA_CHAN0 0
+#define IRQ_DMA_CHAN1 1
+#define IRQ_DMA_CHAN2 2
+#define IRQ_DMA_CHAN3 3
+#define IRQ_DMA_CHAN4 4
+#define IRQ_DMA_CHAN5 5
+#define IRQ_DMA_CHAN6 6
+#define IRQ_DMA_CHAN7 7
+#define IRQ_DMA_CHAN8 8
+#define IRQ_DMA_CHAN9 9
+#define IRQ_DMA_CHAN10 10
+#define IRQ_DMA_CHAN11 11
+#define IRQ_DMA_CHAN12 12
+#define IRQ_DMA_CHAN13 13
+#define IRQ_DMA_CHAN14 14
+#define IRQ_DMA_CHAN15 15
+#define IRQ_DMA_ERR 16
+#define IRQ_MCM 17
+#define IRQ_FLASH_CMD 18
+#define IRQ_FLASH_COLLISION 19
+#define IRQ_LOW_VOLTAGE 20
+#define IRQ_LOW_LEAKAGE 21
+#define IRQ_WDOG_OR_EVM 22
+#define IRQ_RAND_NUM_GEN 23
+#define IRQ_I2C0 24
+#define IRQ_I2C1 25
+#define IRQ_SPI0 26
+#define IRQ_SPI1 27
+#define IRQ_I2S0_TX 28
+#define IRQ_I2S0_RX 29
+#define IRQ_RESERVED0 30
+#define IRQ_RESERVED1 37
+#define IRQ_RESERVED2 38
+#define IRQ_ADC0 39
+#define IRQ_CMP0 40
+#define IRQ_CMP1 41
+#define IRQ_FTM0 42
+#define IRQ_FTM1 43
+#define IRQ_FTM2 44
+#define IRQ_CMT 45
+#define IRQ_RTC_ALARM 46
+#define IRQ_RTC_SEC 47
+#define IRQ_TIMER0 48
+#define IRQ_TIMER1 49
+#define IRQ_TIMER2 50
+#define IRQ_TIMER3 51
+#define IRQ_PDB 52
+#define IRQ_USB_OTG 53
+#define IRQ_USB_CHARGE 54
+#define IRQ_RESERVED3 55
+#define IRQ_RESERVED4 56
+#define IRQ_MCG 57
+#define IRQ_LOW_PWR_TIMER 58
+#define IRQ_GPIO_PORTA 59
+#define IRQ_GPIO_PORTB 60
+#define IRQ_GPIO_PORTC 61
+#define IRQ_GPIO_PORTD 62
+#define IRQ_GPIO_PORTE 63
+#define IRQ_SOFTWARE 64
+
+#endif
+
 #ifndef _ASMLANGUAGE
 
+#include <fsl_common.h>
 #include <device.h>
 #include <misc/util.h>
 #include <drivers/rand32.h>