Skip to content
This repository has been archived by the owner on May 19, 2022. It is now read-only.

Commit

Permalink
Rebuild for 7z014s
Browse files Browse the repository at this point in the history
  • Loading branch information
jtikalsky committed Jan 21, 2020
1 parent 27b6817 commit b33d4ae
Show file tree
Hide file tree
Showing 12 changed files with 2,787 additions and 2,646 deletions.
Binary file modified Vivado/ipmc_zynq_vivado.sdk/ipmc_bd_wrapper.hdf
Binary file not shown.
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -12444,13 +12444,22 @@ ps7_debug()
}


int ps7_reset_apu()
{
mask_write(0xF8000244, 0x00000022U ,0x00000022U);
return PS7_INIT_SUCCESS;
}

int
ps7_init()
{
// Get the PS_VERSION on run time
unsigned long si_ver = ps7GetSiliconVersion ();
int ret;
//int pcw_ver = 0;

ret = ps7_reset_apu();
if (ret != PS7_INIT_SUCCESS) return ret;

if (si_ver == PCW_SILICON_VERSION_1) {
ps7_mio_init_data = ps7_mio_init_data_1_0;
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -77,7 +77,7 @@
</DIV>
</A>
</DIV>
<DIV class="content_container">This design is targeted for xc7z020 board (part number: xc7z020clg400-1)
<DIV class="content_container">This design is targeted for xc7z014s board (part number: xc7z014sclg400-1)

<br>
<H1>Zynq Design Summary</H1>
Expand All @@ -87,7 +87,7 @@ <H1>Zynq Design Summary</H1>
<B>Device</B>
</TD>
<TD width=80% BGCOLOR=#E6E6E6>
xc7z020
xc7z014s
</TD>
</TR>
<TR valign="top">
Expand All @@ -103,7 +103,7 @@ <H1>Zynq Design Summary</H1>
<B>Part</B>
</TD>
<TD width=80% BGCOLOR=#E6E6E6>
xc7z020clg400-1
xc7z014sclg400-1
</TD>
</TR>
<TR valign="top">
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -772,11 +772,17 @@ proc ps7_debug {} {
ps7_debug_3_0
}
}

proc ps7_apu_reset {} {
mask_write 0xF8000244 0x00000022 0x00000022
}
proc ps7_init {} {
variable PCW_SILICON_VER_1_0
variable PCW_SILICON_VER_2_0
variable PCW_SILICON_VER_3_0
set sil_ver [ps_version]

ps7_apu_reset
if { $sil_ver == $PCW_SILICON_VER_1_0} {
ps7_mio_init_data_1_0
ps7_pll_init_data_1_0
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -12435,13 +12435,22 @@ ps7_debug()
}


int ps7_reset_apu()
{
mask_write(0xF8000244, 0x00000022U ,0x00000022U);
return PS7_INIT_SUCCESS;
}

int
ps7_init()
{
// Get the PS_VERSION on run time
unsigned long si_ver = ps7GetSiliconVersion ();
int ret;
//int pcw_ver = 0;

ret = ps7_reset_apu();
if (ret != PS7_INIT_SUCCESS) return ret;

if (si_ver == PCW_SILICON_VERSION_1) {
ps7_mio_init_data = ps7_mio_init_data_1_0;
Expand Down
Binary file not shown.
Original file line number Diff line number Diff line change
@@ -1,8 +1,8 @@
--Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.
----------------------------------------------------------------------------------
--Tool Version: Vivado v.2018.2 (lin64) Build 2258646 Thu Jun 14 20:02:38 MDT 2018
--Date : Fri Aug 2 12:26:49 2019
--Host : beck.hep.wisc.edu running 64-bit CentOS Linux release 7.6.1810 (Core)
--Date : Tue Jan 21 11:21:59 2020
--Host : sonata.hep.wisc.edu running 64-bit Ubuntu 18.04.3 LTS
--Command : generate_target ipmc_bd_wrapper.bd
--Design : ipmc_bd_wrapper
--Purpose : IP block netlist
Expand Down Expand Up @@ -85,10 +85,10 @@ architecture STRUCTURE of ipmc_bd_wrapper is
GPIO_2_tri_i : in STD_LOGIC_VECTOR ( 31 downto 0 );
GPIO_2_tri_o : out STD_LOGIC_VECTOR ( 31 downto 0 );
GPIO_2_tri_t : out STD_LOGIC_VECTOR ( 31 downto 0 );
TCK : out STD_LOGIC;
TMS : out STD_LOGIC;
TDI : inout STD_LOGIC;
TDO : inout STD_LOGIC
TDO : inout STD_LOGIC;
TCK : out STD_LOGIC
);
end component ipmc_bd;
component IOBUF is
Expand Down
652 changes: 326 additions & 326 deletions Vivado/ipmc_zynq_vivado.srcs/sources_1/bd/ipmc_bd/ipmc_bd.bd

Large diffs are not rendered by default.

Loading

0 comments on commit b33d4ae

Please sign in to comment.