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Merge pull request #128 from tum-ei-eda/patch_uma_new
Support for UMA examples and their ETISS plugins
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62 changes: 62 additions & 0 deletions
62
resources/frameworks/tvm/tvmc_extension/QVanilla_Accelerator/backend.py
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# Licensed to the Apache Software Foundation (ASF) under one | ||
# or more contributor license agreements. See the NOTICE file | ||
# distributed with this work for additional information | ||
# regarding copyright ownership. The ASF licenses this file | ||
# to you under the Apache License, Version 2.0 (the | ||
# "License"); you may not use this file except in compliance | ||
# with the License. You may obtain a copy of the License at | ||
# | ||
# http://www.apache.org/licenses/LICENSE-2.0 | ||
# | ||
# Unless required by applicable law or agreed to in writing, | ||
# software distributed under the License is distributed on an | ||
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY | ||
# KIND, either express or implied. See the License for the | ||
# specific language governing permissions and limitations | ||
# under the License. | ||
"""UMA backend for the q_vanilla_accelerator accelerator""" | ||
from .passes import QVanillaAcceleratorConv2dPass, ConvertLayout | ||
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# , ConvertLayout, Canonicalize, QVanillaAcceleratorDensePass | ||
from tvm.relay.backend.contrib.uma.api.utils import PassPhase | ||
from tvm.relay.backend.contrib.uma.backend import UMABackend | ||
from .codegen import gen_includes | ||
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# from .patterns import conv2d_pattern, dense_pattern, qnn_conv2d_pattern | ||
from .patterns import qnn_conv2d_add_pattern | ||
from .strategies import qnn_conv2d_strategy | ||
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class QVanillaAcceleratorBackend(UMABackend): | ||
"""UMA backend for the QVanillaAccelerator accelerator.""" | ||
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def __init__(self): | ||
print("init!") | ||
super().__init__() | ||
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# Target configuration | ||
self._register_target_attr("dimension") | ||
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# Relay Pattern registration | ||
self._register_pattern("qnn_conv2d_add", qnn_conv2d_add_pattern()) | ||
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# self._register_pattern("dense", dense_pattern()) | ||
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# Relay to Relay function registration | ||
self._register_relay_pass(PassPhase.PRE_PARTITIONING, ConvertLayout()) | ||
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# self._register_relay_pass(PassPhase.POST_PARTITIONING_0, Canonicalize()) | ||
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# Relay to TIR function registration | ||
self._register_operator_strategy("qnn.conv2d", qnn_conv2d_strategy) | ||
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self._register_tir_pass(PassPhase.TIR_PHASE_0, QVanillaAcceleratorConv2dPass()) | ||
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# self._register_tir_pass(PassPhase.TIR_PHASE_0, QVanillaAcceleratorDensePass()) | ||
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# TIR to runtime function registration | ||
self._register_codegen(fmt="c", includes=gen_includes) | ||
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@property | ||
def target_name(self): | ||
return "q_vanilla_accelerator" |
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resources/frameworks/tvm/tvmc_extension/QVanilla_Accelerator/codegen.py
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# Licensed to the Apache Software Foundation (ASF) under one | ||
# or more contributor license agreements. See the NOTICE file | ||
# distributed with this work for additional information | ||
# regarding copyright ownership. The ASF licenses this file | ||
# to you under the Apache License, Version 2.0 (the | ||
# "License"); you may not use this file except in compliance | ||
# with the License. You may obtain a copy of the License at | ||
# | ||
# http://www.apache.org/licenses/LICENSE-2.0 | ||
# | ||
# Unless required by applicable law or agreed to in writing, | ||
# software distributed under the License is distributed on an | ||
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY | ||
# KIND, either express or implied. See the License for the | ||
# specific language governing permissions and limitations | ||
# under the License. | ||
"""UMA codegen for the q_vanilla_accelerator accelerator""" | ||
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# import tvm | ||
import pathlib | ||
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def gen_includes() -> str: | ||
topdir = pathlib.Path(__file__).parent.absolute() | ||
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includes = "" | ||
includes += f'#include "{topdir}/conv2dnchw.cc"' | ||
return includes |
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resources/frameworks/tvm/tvmc_extension/QVanilla_Accelerator/conv2dnchw.cc
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#include <stdlib.h> | ||
#include <stdint.h> | ||
#include <stdio.h> | ||
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#ifdef __cplusplus | ||
extern "C" | ||
#endif | ||
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/*! | ||
* \brief Conv2D function for mock-accelerator examples. Limited to same-padded Conv2D with | ||
* stride (1,1) and datatype int8, as well as a bias addition. \param ifmap Pointer to input feature map data of size | ||
* iw*ih*ic*sizeof(int8). \param weights Pointer to weight data of size | ||
* kh*kw*ic**oc*sizeof(int8). \param bias_data Pointer to bias data of size oc*sizeof(int32). | ||
* \param result Pointer to output feature map data of size | ||
* iw*ih*oc*sizeof(int32). \param oc Number of channels of output feature map. \param iw Width | ||
* of input feature map, ifmap. \param ih Height of input feature map, ifmap. \param ic Number | ||
* of channels of input feature map. \param kh Height of convolution kernels. \param kw Width of | ||
* convolution kernels.\param i_zp and k_zp zero point parameters of | ||
* input feature map and kernel. | ||
* | ||
* \return error code | ||
* | ||
*/ | ||
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typedef struct regs | ||
{ | ||
uint32_t ifmap; | ||
uint32_t weights; | ||
uint32_t bias; | ||
uint32_t result; | ||
int32_t oc; | ||
int32_t iw; | ||
int32_t ih; | ||
int32_t ic; | ||
int32_t kh; | ||
int32_t kw; | ||
int32_t i_zp; | ||
int32_t k_zp; | ||
uint32_t control; | ||
uint32_t status; | ||
} regs_t; | ||
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int q_vanilla_accelerator_conv2dnchw(int8_t* q_vanilla_accelerator_0_i0, int8_t* q_vanilla_accelerator_0_i1, int32_t* bias_data, int32_t* compute, | ||
int32_t oc, int32_t iw, int32_t ih, int32_t ic, int32_t kh, int32_t kw, int32_t i_zp, int32_t k_zp) { | ||
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// QVanillaAcceleratorT (with timing) base_adr = 0x70002000, | ||
// for QVanillaAccelerator (w/o timing) replace this file with conv2dnchw1.cc contents or interchange the names! | ||
regs_t *p_regs = (regs_t *)0x70002000; | ||
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p_regs->ifmap = (uint32_t) q_vanilla_accelerator_0_i0; | ||
p_regs->weights = (uint32_t) q_vanilla_accelerator_0_i1; | ||
p_regs->bias = (uint32_t) bias_data; | ||
p_regs->result = (uint32_t) compute; | ||
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p_regs->oc = oc; | ||
p_regs->iw = iw; | ||
p_regs->ih = ih; | ||
p_regs->ic = ic; | ||
p_regs->kh = kh; | ||
p_regs->kw = kw; | ||
p_regs->i_zp = i_zp; | ||
p_regs->k_zp = k_zp; | ||
p_regs->control = 1; //issue start signal | ||
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// volatile uint32_t * status_reg = (int32_t*) 0x70000034; | ||
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volatile int32_t ready = 0; | ||
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while (!ready) { | ||
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ready = 0x1 & (p_regs->status); | ||
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// printf("ready = %d\n", ready); | ||
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} | ||
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printf("staus: completed (driver)\n"); | ||
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return 0; | ||
} |
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resources/frameworks/tvm/tvmc_extension/QVanilla_Accelerator/conv2dnchw1.cc
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#include <stdlib.h> | ||
#include <stdint.h> | ||
#include <stdio.h> | ||
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#ifdef __cplusplus | ||
extern "C" | ||
#endif | ||
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/*! | ||
* \brief Conv2D function for mock-accelerator examples. Limited to same-padded Conv2D with | ||
* stride (1,1) and datatype int8, as well as a bias addition. \param ifmap Pointer to input feature map data of size | ||
* iw*ih*ic*sizeof(int8). \param weights Pointer to weight data of size | ||
* kh*kw*ic**oc*sizeof(int8). \param bias_data Pointer to bias data of size oc*sizeof(int32). | ||
* \param result Pointer to output feature map data of size | ||
* iw*ih*oc*sizeof(int32). \param oc Number of channels of output feature map. \param iw Width | ||
* of input feature map, ifmap. \param ih Height of input feature map, ifmap. \param ic Number | ||
* of channels of input feature map. \param kh Height of convolution kernels. \param kw Width of | ||
* convolution kernels.\param i_zp and k_zp zero point parameters of | ||
* input feature map and kernel. | ||
* | ||
* \return error code | ||
* | ||
*/ | ||
typedef struct regs | ||
{ | ||
uint32_t ifmap; | ||
uint32_t weights; | ||
uint32_t bias; | ||
uint32_t result; | ||
int32_t oc; | ||
int32_t iw; | ||
int32_t ih; | ||
int32_t ic; | ||
int32_t kh; | ||
int32_t kw; | ||
int32_t i_zp; | ||
int32_t k_zp; | ||
uint32_t control; | ||
} regs_t; | ||
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int q_vanilla_accelerator_conv2dnchw(int8_t* q_vanilla_accelerator_0_i0, int8_t* q_vanilla_accelerator_0_i1, int32_t* bias_data, int32_t* compute, | ||
int32_t oc, int32_t iw, int32_t ih, int32_t ic, int32_t kh, int32_t kw, int32_t i_zp, int32_t k_zp) { | ||
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// QVanillaAccelerator (without timing) base_adr = 0x70000000, | ||
regs_t *p_regs = (regs_t *)0x70000000; | ||
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p_regs->ifmap = (uint32_t) q_vanilla_accelerator_0_i0; | ||
p_regs->weights = (uint32_t) q_vanilla_accelerator_0_i1; | ||
p_regs->bias = (uint32_t) bias_data; | ||
p_regs->result = (uint32_t) compute; | ||
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p_regs->oc = oc; | ||
p_regs->iw = iw; | ||
p_regs->ih = ih; | ||
p_regs->ic = ic; | ||
p_regs->kh = kh; | ||
p_regs->kw = kw; | ||
p_regs->i_zp = i_zp; | ||
p_regs->k_zp = k_zp; | ||
p_regs->control = 1; //issue start signal | ||
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return 0; | ||
} |
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