Fix merge and compile errors (#13)

triton-lang · Dec 6, 2024 · 4ebfed7 · 4ebfed7
1 parent 7d9f660
commit 4ebfed7
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Showing 2 changed files with 4 additions and 3 deletions.
diff --git a/third_party/cpu/include/TritonToTritonCPU/Passes.td b/third_party/cpu/include/TritonToTritonCPU/Passes.td
@@ -83,7 +83,8 @@ def ConvertHistogramOp : Pass<"triton-cpu-convert-histogram-op", "mlir::ModuleOp
 
     let dependentDialects = ["mlir::arith::ArithDialect",
                              "mlir::memref::MemRefDialect",
-                             "mlir::vector::VectorDialect",
+                             "mlir::vector::VectorDialect"];
+}
 
 def ConvertReductionOp : Pass<"triton-cpu-convert-reduction", "mlir::ModuleOp"> {
     let summary = "Convert Triton ReduceOp.";

diff --git a/third_party/cpu/lib/TritonToTritonCPU/ConvertReductionOp.cpp b/third_party/cpu/lib/TritonToTritonCPU/ConvertReductionOp.cpp
@@ -149,11 +149,11 @@ struct ReduceOpConversion : public OpConversionPattern<triton::ReduceOp> {
     else if (kind == vector::CombiningKind::MAXSI)
       initVal = rewriter.getIntegerAttr(
           elemTy,
-          static_cast<int64_t>(1UL << (elemTy.getIntOrFloatBitWidth() - 1)));
+          static_cast<int64_t>(-(1UL << (elemTy.getIntOrFloatBitWidth() - 1))));
     else if (kind == vector::CombiningKind::MINSI)
       initVal = rewriter.getIntegerAttr(
           elemTy, static_cast<int64_t>(
-                      1UL << (elemTy.getIntOrFloatBitWidth() - 1) - 1));
+                      (1UL << (elemTy.getIntOrFloatBitWidth() - 1)) - 1));
     else if (kind == vector::CombiningKind::MINIMUMF ||
              kind == vector::CombiningKind::MINNUMF) {
       if (elemTy.isF32())