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edac: change the mem allocation scheme to make Documentation/kobject.…
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…txt happy

Kernel kobjects have rigid rules: each container object should be
dynamically allocated, and can't be allocated into a single kmalloc.

EDAC never obeyed this rule: it has a single malloc function that
allocates all needed data into a single kzalloc.

As this is not accepted anymore, change the allocation schema of the
EDAC *_info structs to enforce this Kernel standard.

Acked-by: Chris Metcalf <[email protected]>
Cc: Aristeu Rozanski <[email protected]>
Cc: Doug Thompson <[email protected]>
Cc: Greg K H <[email protected]>
Cc: Borislav Petkov <[email protected]>
Cc: Mark Gross <[email protected]>
Cc: Tim Small <[email protected]>
Cc: Ranganathan Desikan <[email protected]>
Cc: "Arvind R." <[email protected]>
Cc: Olof Johansson <[email protected]>
Cc: Egor Martovetsky <[email protected]>
Cc: Michal Marek <[email protected]>
Cc: Jiri Kosina <[email protected]>
Cc: Dmitry Eremin-Solenikov <[email protected]>
Cc: Benjamin Herrenschmidt <[email protected]>
Cc: Hitoshi Mitake <[email protected]>
Cc: Andrew Morton <[email protected]>
Cc: Shaohui Xie <[email protected]>
Cc: [email protected]
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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Mauro Carvalho Chehab committed Jun 11, 2012
1 parent e39f4ea commit de3910e
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Showing 22 changed files with 242 additions and 164 deletions.
10 changes: 6 additions & 4 deletions drivers/edac/amd64_edac.c
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Original file line number Diff line number Diff line change
Expand Up @@ -2205,6 +2205,7 @@ static u32 amd64_csrow_nr_pages(struct amd64_pvt *pvt, u8 dct, int csrow_nr)
static int init_csrows(struct mem_ctl_info *mci)
{
struct csrow_info *csrow;
struct dimm_info *dimm;
struct amd64_pvt *pvt = mci->pvt_info;
u64 base, mask;
u32 val;
Expand All @@ -2222,7 +2223,7 @@ static int init_csrows(struct mem_ctl_info *mci)
!!(val & NBCFG_CHIPKILL), !!(val & NBCFG_ECC_ENABLE));

for_each_chip_select(i, 0, pvt) {
csrow = &mci->csrows[i];
csrow = mci->csrows[i];

if (!csrow_enabled(i, 0, pvt) && !csrow_enabled(i, 1, pvt)) {
debugf1("----CSROW %d EMPTY for node %d\n", i,
Expand Down Expand Up @@ -2257,9 +2258,10 @@ static int init_csrows(struct mem_ctl_info *mci)
edac_mode = EDAC_NONE;

for (j = 0; j < pvt->channel_count; j++) {
csrow->channels[j].dimm->mtype = mtype;
csrow->channels[j].dimm->edac_mode = edac_mode;
csrow->channels[j].dimm->nr_pages = nr_pages;
dimm = csrow->channels[j]->dimm;
dimm->mtype = mtype;
dimm->edac_mode = edac_mode;
dimm->nr_pages = nr_pages;
}
}

Expand Down
8 changes: 4 additions & 4 deletions drivers/edac/amd76x_edac.c
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Original file line number Diff line number Diff line change
Expand Up @@ -146,7 +146,7 @@ static int amd76x_process_error_info(struct mem_ctl_info *mci,
if (handle_errors) {
row = (info->ecc_mode_status >> 4) & 0xf;
edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
mci->csrows[row].first_page, 0, 0,
mci->csrows[row]->first_page, 0, 0,
row, 0, -1,
mci->ctl_name, "", NULL);
}
Expand All @@ -161,7 +161,7 @@ static int amd76x_process_error_info(struct mem_ctl_info *mci,
if (handle_errors) {
row = info->ecc_mode_status & 0xf;
edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
mci->csrows[row].first_page, 0, 0,
mci->csrows[row]->first_page, 0, 0,
row, 0, -1,
mci->ctl_name, "", NULL);
}
Expand Down Expand Up @@ -194,8 +194,8 @@ static void amd76x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
int index;

for (index = 0; index < mci->nr_csrows; index++) {
csrow = &mci->csrows[index];
dimm = csrow->channels[0].dimm;
csrow = mci->csrows[index];
dimm = csrow->channels[0]->dimm;

/* find the DRAM Chip Select Base address and mask */
pci_read_config_dword(pdev,
Expand Down
8 changes: 4 additions & 4 deletions drivers/edac/cell_edac.c
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Original file line number Diff line number Diff line change
Expand Up @@ -33,7 +33,7 @@ struct cell_edac_priv
static void cell_edac_count_ce(struct mem_ctl_info *mci, int chan, u64 ar)
{
struct cell_edac_priv *priv = mci->pvt_info;
struct csrow_info *csrow = &mci->csrows[0];
struct csrow_info *csrow = mci->csrows[0];
unsigned long address, pfn, offset, syndrome;

dev_dbg(mci->pdev, "ECC CE err on node %d, channel %d, ar = 0x%016llx\n",
Expand All @@ -56,7 +56,7 @@ static void cell_edac_count_ce(struct mem_ctl_info *mci, int chan, u64 ar)
static void cell_edac_count_ue(struct mem_ctl_info *mci, int chan, u64 ar)
{
struct cell_edac_priv *priv = mci->pvt_info;
struct csrow_info *csrow = &mci->csrows[0];
struct csrow_info *csrow = mci->csrows[0];
unsigned long address, pfn, offset;

dev_dbg(mci->pdev, "ECC UE err on node %d, channel %d, ar = 0x%016llx\n",
Expand Down Expand Up @@ -126,7 +126,7 @@ static void cell_edac_check(struct mem_ctl_info *mci)

static void __devinit cell_edac_init_csrows(struct mem_ctl_info *mci)
{
struct csrow_info *csrow = &mci->csrows[0];
struct csrow_info *csrow = mci->csrows[0];
struct dimm_info *dimm;
struct cell_edac_priv *priv = mci->pvt_info;
struct device_node *np;
Expand All @@ -150,7 +150,7 @@ static void __devinit cell_edac_init_csrows(struct mem_ctl_info *mci)
csrow->last_page = csrow->first_page + nr_pages - 1;

for (j = 0; j < csrow->nr_channels; j++) {
dimm = csrow->channels[j].dimm;
dimm = csrow->channels[j]->dimm;
dimm->mtype = MEM_XDR;
dimm->edac_mode = EDAC_SECDED;
dimm->nr_pages = nr_pages / csrow->nr_channels;
Expand Down
8 changes: 4 additions & 4 deletions drivers/edac/cpc925_edac.c
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Original file line number Diff line number Diff line change
Expand Up @@ -348,7 +348,7 @@ static void cpc925_init_csrows(struct mem_ctl_info *mci)
if (bba == 0)
continue; /* not populated */

csrow = &mci->csrows[index];
csrow = mci->csrows[index];

row_size = bba * (1UL << 28); /* 256M */
csrow->first_page = last_nr_pages;
Expand Down Expand Up @@ -380,7 +380,7 @@ static void cpc925_init_csrows(struct mem_ctl_info *mci)
break;
}
for (j = 0; j < csrow->nr_channels; j++) {
dimm = csrow->channels[j].dimm;
dimm = csrow->channels[j]->dimm;
dimm->nr_pages = nr_pages / csrow->nr_channels;
dimm->mtype = MEM_RDDR;
dimm->edac_mode = EDAC_SECDED;
Expand Down Expand Up @@ -463,15 +463,15 @@ static void cpc925_mc_get_pfn(struct mem_ctl_info *mci, u32 mear,
*csrow = rank;

#ifdef CONFIG_EDAC_DEBUG
if (mci->csrows[rank].first_page == 0) {
if (mci->csrows[rank]->first_page == 0) {
cpc925_mc_printk(mci, KERN_ERR, "ECC occurs in a "
"non-populated csrow, broken hardware?\n");
return;
}
#endif

/* Revert csrow number */
pa = mci->csrows[rank].first_page << PAGE_SHIFT;
pa = mci->csrows[rank]->first_page << PAGE_SHIFT;

/* Revert column address */
col += bcnt;
Expand Down
4 changes: 2 additions & 2 deletions drivers/edac/e752x_edac.c
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Original file line number Diff line number Diff line change
Expand Up @@ -1096,7 +1096,7 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
for (last_cumul_size = index = 0; index < mci->nr_csrows; index++) {
/* mem_dev 0=x8, 1=x4 */
mem_dev = (dra >> (index * 4 + 2)) & 0x3;
csrow = &mci->csrows[remap_csrow_index(mci, index)];
csrow = mci->csrows[remap_csrow_index(mci, index)];

mem_dev = (mem_dev == 2);
pci_read_config_byte(pdev, E752X_DRB + index, &value);
Expand Down Expand Up @@ -1127,7 +1127,7 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
} else
edac_mode = EDAC_NONE;
for (i = 0; i < csrow->nr_channels; i++) {
struct dimm_info *dimm = csrow->channels[i].dimm;
struct dimm_info *dimm = csrow->channels[i]->dimm;

debugf3("Initializing rank at (%i,%i)\n", index, i);
dimm->nr_pages = nr_pages / csrow->nr_channels;
Expand Down
4 changes: 2 additions & 2 deletions drivers/edac/e7xxx_edac.c
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Original file line number Diff line number Diff line change
Expand Up @@ -378,7 +378,7 @@ static void e7xxx_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
for (index = 0; index < mci->nr_csrows; index++) {
/* mem_dev 0=x8, 1=x4 */
mem_dev = (dra >> (index * 4 + 3)) & 0x1;
csrow = &mci->csrows[index];
csrow = mci->csrows[index];

pci_read_config_byte(pdev, E7XXX_DRB + index, &value);
/* convert a 64 or 32 MiB DRB to a page size. */
Expand Down Expand Up @@ -409,7 +409,7 @@ static void e7xxx_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
edac_mode = EDAC_NONE;

for (j = 0; j < drc_chan + 1; j++) {
dimm = csrow->channels[j].dimm;
dimm = csrow->channels[j]->dimm;

dimm->nr_pages = nr_pages / (drc_chan + 1);
dimm->grain = 1 << 12; /* 4KiB - resolution of CELOG */
Expand Down
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