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[proposal] add rtl/test_setups #136
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* README to illustrate test setups * test setups VHDL files (can be uses as TOPs) * adapted GHDL setup script
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Athough not ready yet, I wonder how would the "load app from SPI flash" fit in these test_setups. Would that be included in the "direct" case, or would it be a third test setup?
Other than that, I like where this is heading!
I intentionally left this out. Booting from SPI flash seems like a "pro option". The idea of these (basic) test setups is to be as minimalist as possible to only show the basic configuration (and boot) setups.
🎉 😄 👍 |
I think this can be merged, right? The changes shouldn't interfere with anything (I think). |
rtl/test_setups/neorv32_test_setup_bootloader.vhd provides the same functionality and is illustrated in the user guide
For the records:
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This is a "spin-off" of #131
This PR is a proposal to add a
rtl/test_setups
folder, which provides two minimal test setup SoC configuration intended to be used as FPGA-, board- and toolchain-independent top entity for "first encounters". These setups are used in the updated User Guide (section "General Hardware Setup").Both setups only provide an 8-bit wide GPIO.output port, clock, reset and UART RX & TX (only for the bootloader setup). Both setups also provide a minimal set of configuration generics: internal memory size configurations, clock speed.
rtl/test_setups/neorv32_test_setup_approm.vhd
uses internal IMEM as ROM, pre-initialized with software applicationrtl/test_setups/neorv32_test_setup_bootloader.vhd
uses internal IMEM as RAM, software application upload vie UART + bootloaderThe documentation (data sheet and user guide; READMEs) and the GHDL setup script have been modified accordingly.