Vanadis examples 2 #2439
Vanadis examples 2 #2439
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Status Flag 'Pre-Test Inspection' - - This Pull Request Requires Inspection... The code must be inspected by a member of the Team before Testing/Merging |
| mmuType = "simpleMMU" | ||
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| # Define SST core options | ||
| sst.setProgramOption("timebase", "1ps") |
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Remove these two lines, they are not needed. "stop-at" can be used to force the simulation to stop at a certain time but "timebase" very rarely needs to be (or should be) changed.
| sst.setStatisticOutput("sst.statOutputConsole") | ||
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| # full_exe_name = os.getenv("VANADIS_EXE", "./small/" + testDir + "/" + exe + "/" + isa + "/" + exe ) | ||
| full_exe_name = "/home/skinkea/sst/sst-elements/sst-elements-src/src/sst/elements/vanadis/tests/small/basic-io/hello-world/riscv64/hello-world" |
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Make directory path relative so that it is runnable from the examples directory.
| full_exe_name = "/home/skinkea/sst/sst-elements/sst-elements-src/src/sst/elements/vanadis/tests/small/basic-io/hello-world/riscv64/hello-world" | ||
| exe_name= full_exe_name.split("/")[-1] | ||
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| verbosity = int(os.getenv("VANADIS_VERBOSE", 0)) |
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It'd be helpful to add a comment describing each environment variable since this file is an example.
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| import os | |||
| import sst | |||
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Add a comment here describing what memory system/core config this file describes (e.g., single core, 3-level cache hierarchy with one memory) and how to run it and if any parameters need to be changed (e.g., paths) to get it to run.
will do. |
THis pull requests creates an example for the vanadis element. The example demonstrates creating a simple simulation of a CPU on RISC-V architecture with L1, L2, and L3 caches. This example runs a hello-world on this CPU.
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