Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

white list MMX and MSA target features #46322

Merged
merged 1 commit into from
Nov 29, 2017
Merged
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
5 changes: 4 additions & 1 deletion src/librustc_trans/llvm_util.rs
Original file line number Diff line number Diff line change
Expand Up @@ -85,7 +85,7 @@ const X86_WHITELIST: &'static [&'static str] = &["avx\0", "avx2\0", "bmi\0", "bm
"avx512dq\0", "avx512er\0",
"avx512f\0", "avx512ifma\0",
"avx512pf\0", "avx512vbmi\0",
"avx512vl\0", "avx512vpopcntdq\0"];
"avx512vl\0", "avx512vpopcntdq\0", "mmx\0"];

const HEXAGON_WHITELIST: &'static [&'static str] = &["hvx\0", "hvx-double\0"];

Expand All @@ -94,6 +94,8 @@ const POWERPC_WHITELIST: &'static [&'static str] = &["altivec\0",
"power8-vector\0", "power9-vector\0",
"vsx\0"];

const MIPS_WHITELIST: &'static [&'static str] = &["msa\0"];

pub fn target_features(sess: &Session) -> Vec<Symbol> {
let target_machine = create_target_machine(sess);

Expand All @@ -102,6 +104,7 @@ pub fn target_features(sess: &Session) -> Vec<Symbol> {
"aarch64" => AARCH64_WHITELIST,
"x86" | "x86_64" => X86_WHITELIST,
"hexagon" => HEXAGON_WHITELIST,
"mips" | "mips64" => MIPS_WHITELIST,
"powerpc" | "powerpc64" => POWERPC_WHITELIST,
_ => &[],
};
Expand Down