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Rollup merge of rust-lang#135757 - no1wudi:master, r=compiler-errors Add NuttX support for AArch64 and ARMv7-A targets This patch adds tier 3 support for AArch64 and ARMv7-A targets in NuttX, including: - AArch64 target: aarch64-unknown-nuttx - ARMv7-A target: armv7a-nuttx-eabi, armv7a-nuttx-eabihf - Thumbv7-A target: thumbv7a-nuttx-eabi, thumbv7a-nuttx-eabihf
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46 changes: 46 additions & 0 deletions
46
compiler/rustc_target/src/spec/targets/aarch64_unknown_nuttx.rs
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// Generic AArch64 target for NuttX OS | ||
// | ||
// Can be used in conjunction with the `target-feature` and | ||
// `target-cpu` compiler flags to opt-in more hardware-specific | ||
// features. | ||
// | ||
// For example, `-C target-cpu=cortex-a53`. | ||
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use crate::spec::{ | ||
Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, SanitizerSet, StackProbeType, Target, | ||
TargetOptions, cvs, | ||
}; | ||
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pub(crate) fn target() -> Target { | ||
let opts = TargetOptions { | ||
linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), | ||
linker: Some("rust-lld".into()), | ||
// Enable the Cortex-A53 errata 843419 mitigation by default | ||
pre_link_args: TargetOptions::link_args(LinkerFlavor::Gnu(Cc::No, Lld::No), &[ | ||
"--fix-cortex-a53-843419", | ||
]), | ||
features: "+v8a,+strict-align,+neon,+fp-armv8".into(), | ||
supported_sanitizers: SanitizerSet::KCFI | SanitizerSet::KERNELADDRESS, | ||
relocation_model: RelocModel::Static, | ||
disable_redzone: true, | ||
max_atomic_width: Some(128), | ||
stack_probes: StackProbeType::Inline, | ||
panic_strategy: PanicStrategy::Abort, | ||
families: cvs!["unix"], | ||
os: "nuttx".into(), | ||
..Default::default() | ||
}; | ||
Target { | ||
llvm_target: "aarch64-unknown-none".into(), | ||
metadata: crate::spec::TargetMetadata { | ||
description: Some("AArch64 NuttX".into()), | ||
tier: Some(3), | ||
host_tools: Some(false), | ||
std: Some(false), | ||
}, | ||
pointer_width: 64, | ||
data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(), | ||
arch: "aarch64".into(), | ||
options: opts, | ||
} | ||
} |
41 changes: 41 additions & 0 deletions
41
compiler/rustc_target/src/spec/targets/armv7a_nuttx_eabi.rs
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// Targets Cortex-A7/A8/A9 processors (ARMv7-A) running NuttX | ||
// | ||
// This target assumes that the device does NOT have a FPU (Floating Point Unit) | ||
// and will use software floating point operations. This matches the NuttX EABI | ||
// configuration without hardware floating point support. | ||
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use crate::spec::{ | ||
Cc, FloatAbi, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions, cvs, | ||
}; | ||
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pub(crate) fn target() -> Target { | ||
let opts = TargetOptions { | ||
abi: "eabi".into(), | ||
llvm_floatabi: Some(FloatAbi::Soft), | ||
linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), | ||
linker: Some("rust-lld".into()), | ||
features: "+v7,+thumb2,+soft-float,-neon,+strict-align".into(), | ||
relocation_model: RelocModel::Static, | ||
disable_redzone: true, | ||
max_atomic_width: Some(64), | ||
panic_strategy: PanicStrategy::Abort, | ||
emit_debug_gdb_scripts: false, | ||
c_enum_min_bits: Some(8), | ||
families: cvs!["unix"], | ||
os: "nuttx".into(), | ||
..Default::default() | ||
}; | ||
Target { | ||
llvm_target: "armv7a-none-eabi".into(), | ||
metadata: crate::spec::TargetMetadata { | ||
description: Some("ARMv7-A Cortex-A with NuttX".into()), | ||
tier: Some(3), | ||
host_tools: Some(false), | ||
std: Some(false), | ||
}, | ||
pointer_width: 32, | ||
data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), | ||
arch: "arm".into(), | ||
options: opts, | ||
} | ||
} |
41 changes: 41 additions & 0 deletions
41
compiler/rustc_target/src/spec/targets/armv7a_nuttx_eabihf.rs
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// Targets Cortex-A7/A8/A9 processors (ARMv7-A) running NuttX with hardware floating point | ||
// | ||
// This target assumes that the device has a FPU (Floating Point Unit) | ||
// and will use hardware floating point operations. This matches the NuttX EABI | ||
// configuration with hardware floating point support. | ||
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use crate::spec::{ | ||
Cc, FloatAbi, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions, cvs, | ||
}; | ||
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pub(crate) fn target() -> Target { | ||
let opts = TargetOptions { | ||
abi: "eabihf".into(), | ||
llvm_floatabi: Some(FloatAbi::Hard), | ||
linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), | ||
linker: Some("rust-lld".into()), | ||
features: "+v7,+thumb2,+vfp3,+neon,+strict-align".into(), | ||
relocation_model: RelocModel::Static, | ||
disable_redzone: true, | ||
max_atomic_width: Some(64), | ||
panic_strategy: PanicStrategy::Abort, | ||
emit_debug_gdb_scripts: false, | ||
c_enum_min_bits: Some(8), | ||
families: cvs!["unix"], | ||
os: "nuttx".into(), | ||
..Default::default() | ||
}; | ||
Target { | ||
llvm_target: "armv7a-none-eabihf".into(), | ||
metadata: crate::spec::TargetMetadata { | ||
description: Some("ARMv7-A Cortex-A with NuttX (hard float)".into()), | ||
tier: Some(3), | ||
host_tools: Some(false), | ||
std: Some(false), | ||
}, | ||
pointer_width: 32, | ||
data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), | ||
arch: "arm".into(), | ||
options: opts, | ||
} | ||
} |
33 changes: 33 additions & 0 deletions
33
compiler/rustc_target/src/spec/targets/thumbv7a_nuttx_eabi.rs
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// Targets Cortex-A7/A8/A9 processors (ARMv7-A) | ||
// | ||
// This target assumes that the device does NOT have a FPU (Floating Point Unit) | ||
// and will use software floating point operations. This matches the NuttX EABI | ||
// configuration without hardware floating point support. | ||
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use crate::spec::{FloatAbi, Target, TargetOptions, base, cvs}; | ||
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pub(crate) fn target() -> Target { | ||
Target { | ||
llvm_target: "thumbv7a-none-eabi".into(), | ||
metadata: crate::spec::TargetMetadata { | ||
description: None, | ||
tier: None, | ||
host_tools: None, | ||
std: None, | ||
}, | ||
pointer_width: 32, | ||
data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), | ||
arch: "arm".into(), | ||
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options: TargetOptions { | ||
families: cvs!["unix"], | ||
os: "nuttx".into(), | ||
abi: "eabi".into(), | ||
llvm_floatabi: Some(FloatAbi::Soft), | ||
// Cortex-A7/A8/A9 with software floating point | ||
features: "+soft-float,-neon".into(), | ||
max_atomic_width: Some(64), | ||
..base::thumb::opts() | ||
}, | ||
} | ||
} |
37 changes: 37 additions & 0 deletions
37
compiler/rustc_target/src/spec/targets/thumbv7a_nuttx_eabihf.rs
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// Targets Cortex-A7/A8/A9 processors (ARMv7-A) | ||
// | ||
// This target assumes that the device has a FPU (Floating Point Unit) and lowers all (single | ||
// precision) floating point operations to hardware instructions. Cortex-A7/A8/A9 processors | ||
// support VFPv3-D32 or VFPv4-D32 floating point units with optional double-precision support. | ||
// | ||
// This target uses the "hard" floating convention (ABI) where floating point values | ||
// are passed to/from subroutines via FPU registers (S0, S1, D0, D1, etc.). | ||
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use crate::spec::{FloatAbi, Target, TargetOptions, base, cvs}; | ||
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pub(crate) fn target() -> Target { | ||
Target { | ||
llvm_target: "thumbv7a-none-eabihf".into(), | ||
metadata: crate::spec::TargetMetadata { | ||
description: None, | ||
tier: None, | ||
host_tools: None, | ||
std: None, | ||
}, | ||
pointer_width: 32, | ||
data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), | ||
arch: "arm".into(), | ||
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options: TargetOptions { | ||
families: cvs!["unix"], | ||
os: "nuttx".into(), | ||
abi: "eabihf".into(), | ||
llvm_floatabi: Some(FloatAbi::Hard), | ||
// Cortex-A7/A8/A9 support VFPv3-D32/VFPv4-D32 with optional double-precision | ||
// and NEON SIMD instructions | ||
features: "+vfp3,+neon".into(), | ||
max_atomic_width: Some(64), | ||
..base::thumb::opts() | ||
}, | ||
} | ||
} |
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