en devel directive

List of compiler directive

This page lists the compiler directives defined in the current (2019/12/23) RSD.

Compiler directives defined at compile time

Name	Description
RSD_FUNCTIONAL_SIMULATION	Defined when compiling for functional simulation.
RSD_POST_SYNTHESIS_SIMULATION	Defined when compiling to simulate the synthesis results.
RSD_SYNTHESIS	Defined when compiling for synthesis.
RSD_SYNTHESIS_ATLYS	Defined when compiling for synthesis targeting Digilent Atlys.
RSD_SYNTHESIS_TED	Defined when compiling for synthesis targeting Tokyo Electron Device TB-6V-LX760-LSI.
RSD_USE_EXTERNAL_MEMORY	Defined when using memory outside the FPGA as the main memory.
RSD_USE_PROGRAM_LOADER	Defined when using the program loader.

Compiler directives defined by the user according to the design intent

Name	Description
RSD_NARROW_PC	When defined, compress the PC width smaller than 32 bits to reduce the area.
RSD_DISABLE_DEBUG_REGISTER	If defined, debug registers are not compiled. The circuit area becomes small, however, the output of the Konata log is not available.
RSD_DISABLE_HARDWARE_COUNTER	If defined, hardware counters are not compiled.
RSD_STOP_FETCH_ON_PRED_MISS
RSD_ENABLE_REISSUE_ON_CACHE_MISS	If defined, cache-missed load and the instructions that depend on it directly or indirectly are re-issue from the IssueQueue. If not defined, they are re-fetched and re-executed.