Introduction

This specification provides the processor-specific application binary interface document for RISC-V.

This specification consists of the following three parts:

A future revision of this ABI will include a canonical set of mappings for memory model synchronization primitives.

Terms and Abbreviations

This specification uses the following terms and abbreviations:

Term	Meaning
ABI	Application Binary Interface
gABI	Generic System V Application Binary Interface
ELF	Executable and Linking Format
psABI	Processor-Specific ABI
DWARF	Debugging With Arbitrary Record Formats
GOT	Global Offset Table
PLT	Procedure Linkage Table
PC	Program Counter
TLS	Thread-Local Storage
NTBS	Null-Terminated Byte String
XLEN	The width of an integer register in bits
FLEN	The width of a floating-point register in bits
Linker relaxation	A mechanism for optimizing programs at link-time, see [Linker Relaxation] for more detail.
RVWMO	RISC-V Weak Memory Order, as defined in the RISC-V specification.

Note	ABI for big-endian is NOT included in this specification, we intend to define that in future version of this specification.