Merge branch 'master' into eliza/dont-panic

oxidecomputer · Feb 13, 2024 · 982cb5b · 982cb5b
2 parents 83c2b1e + a6c0447
commit 982cb5b
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Showing 4 changed files with 4 additions and 4 deletions.
diff --git a/drv/gimlet-seq-server/src/main.rs b/drv/gimlet-seq-server/src/main.rs
@@ -444,7 +444,7 @@ impl<S: SpiServer + Clone> ServerImpl<S> {
             state: PowerState::A2,
             sys: sys.clone(),
             seq,
-            jefe: jefe.clone(),
+            jefe,
             hf,
             deadline: 0,
         };

diff --git a/drv/stm32xx-i2c-server/src/main.rs b/drv/stm32xx-i2c-server/src/main.rs
@@ -738,7 +738,7 @@ fn configure_muxes(
                     //
                     // In terms of why we might see a resolvable reset: we
                     // have noticed an issue whereby the first I2C transaction
-                    // on some busses (notably, those that share controllers
+                    // on some buses (notably, those that share controllers
                     // via pin muxing) will result in SCL being spuriously
                     // held down (see #1034 for details).  Resets of the I2C
                     // controller seem to always resolve the issue, so we want

diff --git a/task/hiffy/src/stm32g0.rs b/task/hiffy/src/stm32g0.rs
@@ -219,7 +219,7 @@ fn i2c_bulk_write(
     _rval: &mut [u8],
 ) -> Result<usize, Failure> {
     //
-    // We need exactly 8 parameters: the normal i2c paramaters (controller,
+    // We need exactly 8 parameters: the normal i2c parameters (controller,
     // port, mux, segment, address, register) plus the offset and length.
     // Note that the register must be None.
     //

diff --git a/task/hiffy/src/stm32h7.rs b/task/hiffy/src/stm32h7.rs
@@ -305,7 +305,7 @@ fn i2c_bulk_write(
     _rval: &mut [u8],
 ) -> Result<usize, Failure> {
     //
-    // We need exactly 8 parameters: the normal i2c paramaters (controller,
+    // We need exactly 8 parameters: the normal i2c parameters (controller,
     // port, mux, segment, address, register) plus the offset and length.
     // Note that the register must be None.
     //