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    • OpenLane

      Public
      OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
      Python
      Apache License 2.0
      389000Updated Mar 27, 2024Mar 27, 2024
    • basicviz

      Public
      C++
      4002Updated Sep 24, 2023Sep 24, 2023
    • lorina

      Public
      C++ parsing library for simple formats used in logic synthesis and formal verification
      C++
      MIT License
      20100Updated Aug 8, 2023Aug 8, 2023
    • C
      Apache License 2.0
      10300Updated May 18, 2023May 18, 2023
    • GUI for the Utopia EDA
      C++
      Apache License 2.0
      1000Updated May 14, 2023May 14, 2023
    • Fork of Verilog to Routing -- Open Source CAD Flow for FPGA Research
      C++
      Other
      405000Updated May 12, 2023May 12, 2023