Merge pull request renesas-rcar#6 in PATF/arm-trusted-firmware from ~…

…OMIHALAC/arm-trusted-firmware:patf-staging-rcar3-update-1017-rev2 to master

* commit 'a88e70235f73a0fe7b098b7fedac05ded6a03bd9':
  Revert "plat: rcar: security: Make configurable LIFEC DEBUG TRACE access"
  Update IPL and Secure Monitor Rev1.0.17 rev2

plat/renesas/rcar/bl2_rcar_setup.c

@@ -871,6 +871,9 @@ void bl2_plat_set_bl33_ep_info(image_info_t *image,
 {
 	SET_SECURITY_STATE(bl33_ep_info->h.attr, NON_SECURE);
 	bl33_ep_info->spsr = rcar_get_spsr_for_bl33_entry();
+#ifdef RCAR_BL33_ARG0
+	bl33_ep_info->args.arg0 = RCAR_BL33_ARG0;
+#endif
 }
 
 

plat/renesas/rcar/bl2_secure_setting.c

@@ -122,11 +122,7 @@ static const struct {
 	/*        0: registers can be accessed from secure resource only. */
 	/* Bit 7: Life Cycle 0 slave ports. */
 	/*        0: registers can be accessed from secure resource only. */
-#if (LIFEC_DEBUG_TRACE_ENABLE == 1)
-	{SEC_SEL15,		0xFFFFFF7FU},
-#else
 	{SEC_SEL15,		0xFFFFFF3FU},
-#endif
 
 	/** Security group 0 attribute setting for master ports 0 */
 	/** Security group 1 attribute setting for master ports 0 */
@@ -256,13 +252,8 @@ static const struct {
 	/*        SecurityGroup3 */
 	/* Bit 6: TDBG (is described in Debug and Trace section) slave ports.*/
 	/*        SecurityGroup3 */
-#if (LIFEC_DEBUG_TRACE_ENABLE == 1)
-	{SEC_GRP0COND15,	0x00000080U},
-	{SEC_GRP1COND15,	0x00000080U},
-#else
 	{SEC_GRP0COND15,	0x000000C0U},
 	{SEC_GRP1COND15,	0x000000C0U},
-#endif
 
 	/** Security write protection attribute setting for slave ports 0 */
 	/*	{SEC_READONLY0,		0x00000000U},*/