Ancillary Material for the book "Systematic Design of Analog CMOS Circuits"

M-extension for RISC-V cores.

Build your hardware, easily!

A RRAM addon for the NCSU FreePDK 45nm

Fully Open Source FASOC generators built on top of open-source EDA tools

The RIFFA development repository

nextpnr portable FPGA place and route tool

An FPGA-based NFC (RFID) reader with a simple circuit rather than RFID chips. 用FPGA+分立器件电路搭建一个NFC(RFID)读卡器，不需要专门的RFID芯片。

Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130

Triple Modular Redundancy

Verilator open-source SystemVerilog simulator and lint system

The Ultra-Low Power RISC-V Core

Physical Design of Mixed Signal Circuit that performs - "Post-Layout: OpenFASOC flow for 3-bit Flash ADC using TIQ comparator".

Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns

OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/

RePlAce global placement tool

PCIe (1.0a to 2.0) Virtual Root Complex model for Verilog, with Endpoint capabilities

GitHub-based statistics highlighting interesting facts about the HDL industry

🌊 Digital timing diagram rendering engine

A minimal GPU design in Verilog to learn how GPUs work from the ground up

Multi-platform nightly builds of open source digital design and verification tools

The next generation of OpenLane, rewritten from scratch with a modular architecture

SKY130 ReRAM and examples (SkyWater Provided)

Book repository "Analysis and Design of Elementary MOS Amplifier Stages"