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@mrLSD mrLSD released this 09 Dec 09:11
· 43 commits to master since this release
v0.3.0
cd0d90a
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Learn about vigilant mode.

Changes:

  • RISC-V RV32M/RV64M extension instructions set
  • RISC-V RV32M/RV64M extension full Unit Tests coverage
  • Changed Decoder
  • Extended M-extension Executor
  • Separated to 32/64 bit M-extension implementation
  • Changes ASM builder & source files
Assets 2
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