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Update stm32f1xx-hal to 0.7
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mkroening committed Dec 15, 2020
1 parent fd4c53a commit deab8f1
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Showing 3 changed files with 16 additions and 11 deletions.
5 changes: 3 additions & 2 deletions Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -14,17 +14,18 @@ keywords = ["arm", "async", "cortex-m", "stm32"]
as-slice = "0.1"
cortex-m-rt = "0.6"
embedded-hal = "0.2"
embedded-dma = "0.1"
futures = { version = "0.3", default-features = false }
nb = "1.0"
stm32f1xx-hal = { version = "0.6", features = ["rt"] }
stm32f1xx-hal = { version = "0.7", features = ["rt"] }
void = { version = "1.0", default-features = false }

[dev-dependencies.async-embedded]
git = "https://github.com/rust-embedded-community/async-on-embedded"
rev = "aa43ccddffb8ba0460c49bcfe61cba24d966db6c"

[dev-dependencies]
stm32f1xx-hal = { version = "0.6", features = ["stm32f103", "medium"] }
stm32f1xx-hal = { version = "0.7", features = ["stm32f103", "medium"] }
defmt = "0.1"
defmt-rtt = "0.1"
panic-probe = { version = "0.1", features = ["print-defmt"] }
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2 changes: 1 addition & 1 deletion examples/7-echo.rs
Original file line number Diff line number Diff line change
Expand Up @@ -84,7 +84,7 @@ fn main() -> ! {
unsafe { &mut BUF }
};
let mut tx_sink =
TxSink3::new(tx_buf, tx.with_dma(channels.2)).sink_map_err(|_| dma::Error::_Extensible);
TxSink3::new(tx_buf, tx.with_dma(channels.2)).sink_map_err(|_| dma::Error::Overrun);
let rx_buf = {
static mut BUF: [[u8; 8]; 2] = [[0; 8]; 2];
// Safety: We only create one mutable reference
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20 changes: 12 additions & 8 deletions src/serial.rs
Original file line number Diff line number Diff line change
@@ -1,18 +1,19 @@
//! [`Stream`]/[`Sink`]-based abstractions for DMA-based Serial Communication (USART).
use as_slice::{AsMutSlice, AsSlice};
use as_slice::AsMutSlice;
use core::{
convert::Infallible,
future::Future,
pin::Pin,
task::{Context, Poll, Waker},
};
use embedded_dma::{StaticReadBuffer, StaticWriteBuffer};
use futures::{
sink::{Sink, SinkExt},
stream::{FusedStream, Stream},
};
use stm32f1xx_hal::{
dma::{self, CircBuffer, CircReadDma, Event, Half, Transfer, WriteDma, R},
dma::{self, CircBuffer, CircReadDma, Event, Half, Transfer, TransferPayload, WriteDma, R},
serial::{RxDma1, RxDma2, RxDma3, TxDma1, TxDma2, TxDma3},
};

Expand Down Expand Up @@ -73,9 +74,9 @@ transfer_future!(
/// }
/// ```
#[must_use = "sinks do nothing unless polled"]
pub struct TxSink<'a, BUF, PAYLOAD>(Option<TxSinkState<'a, BUF, PAYLOAD>>);
pub struct TxSink<'a, BUF, PAYLOAD: TransferPayload>(Option<TxSinkState<'a, BUF, PAYLOAD>>);

enum TxSinkState<'a, BUF, PAYLOAD> {
enum TxSinkState<'a, BUF, PAYLOAD: TransferPayload> {
Ready {
buf: &'a mut BUF,
tx: PAYLOAD,
Expand All @@ -88,7 +89,7 @@ enum TxSinkState<'a, BUF, PAYLOAD> {
impl<'a, BUF, PAYLOAD> TxSink<'a, BUF, PAYLOAD>
where
TxSink<'a, BUF, PAYLOAD>: Sink<BUF, Error = Infallible>,
PAYLOAD: Unpin,
PAYLOAD: Unpin + TransferPayload,
{
/// Releases the buffer and payload peripheral.
pub async fn release(mut self) -> (&'a mut BUF, PAYLOAD) {
Expand All @@ -103,8 +104,8 @@ where

impl<BUF, PAYLOAD> Sink<BUF> for TxSink<'static, BUF, PAYLOAD>
where
BUF: AsSlice<Element = u8>,
PAYLOAD: WriteDma<BUF, &'static mut BUF, u8> + Unpin,
&'static mut BUF: StaticReadBuffer<Word = u8>,
PAYLOAD: WriteDma<&'static mut BUF, u8> + Unpin,
TransferFuture<Transfer<R, &'static mut BUF, PAYLOAD>>:
Future<Output = (&'static mut BUF, PAYLOAD)>,
{
Expand Down Expand Up @@ -197,7 +198,10 @@ macro_rules! rx_stream {
/// A type shorthand for specifying different DMA channels easily.
pub type $RxStreamX<BUF> = RxStream<BUF, $rxdma>;

impl<BUF> $RxStreamX<BUF> {
impl<BUF> $RxStreamX<BUF>
where
&'static mut [BUF; 2]: StaticWriteBuffer<Word = u8>,
{
/// Creates a new [`RxStream`] from the specified buffers and DMA transmitter.
pub fn new(buf: &'static mut [BUF; 2], mut rx: $rxdma) -> Self
where
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