Grouped conv2d: Use MLIR Op which matches memory layout of weight dimensions #2623
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The linalg Op
linalg.conv_2d_ngchw_fgchw
had a bug whereNow this has been fixed in llvm/llvm-project#73855 which broke the torch-mlir lowering to that Op.
This patch switches lowering in torch-mlir to the newly introduced
linalg.conv_2d_ngchw_gfchw
op which accesses weights in an order that is compatible with PyTorch's memory layout.Fix #2622