Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

recalculate the live interval of the defined register of xvmaddmdp in the VSX FMA mutation pass. #116071

Merged
merged 2 commits into from
Dec 10, 2024

Conversation

diggerlin
Copy link
Contributor

@diggerlin diggerlin commented Nov 13, 2024

The patch fix #116061

The root cause of the assertion is that the FMA mutation pass does not update the subranges of the live interval for the defined register of the modified instruction .

it recalculate the live interval of the defined register of xvmaddmdp in the VSX FMA mutation pass.

@llvmbot
Copy link
Member

llvmbot commented Nov 13, 2024

@llvm/pr-subscribers-backend-powerpc

Author: zhijian lin (diggerlin)

Changes

The patch fix #116061

it recalculate the live interval of the defined register of xvmaddmdp in the VSX FMA mutation pass.


Full diff: https://github.com/llvm/llvm-project/pull/116071.diff

2 Files Affected:

  • (modified) llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp (+4-14)
  • (added) llvm/test/CodeGen/PowerPC/issue116061.ll (+26)
diff --git a/llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp b/llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
index 4b4e47e9532a87..c1f4069e7ac829 100644
--- a/llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
+++ b/llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
@@ -293,21 +293,11 @@ namespace {
           UseMO.substVirtReg(KilledProdReg, KilledProdSubReg, *TRI);
         }
 
-        // Extend the live intervals of the killed product operand to hold the
-        // fma result.
+        // Recalculate the live intervals of the killed product operand.
+        LIS->removeInterval(KilledProdReg);
+        LiveInterval &NewFMAInt =
+            LIS->createAndComputeVirtRegInterval(KilledProdReg);
 
-        LiveInterval &NewFMAInt = LIS->getInterval(KilledProdReg);
-        for (auto &AI : FMAInt) {
-          // Don't add the segment that corresponds to the original copy.
-          if (AI.valno == AddendValNo)
-            continue;
-
-          VNInfo *NewFMAValNo =
-              NewFMAInt.getNextValue(AI.start, LIS->getVNInfoAllocator());
-
-          NewFMAInt.addSegment(
-              LiveInterval::Segment(AI.start, AI.end, NewFMAValNo));
-        }
         LLVM_DEBUG(dbgs() << "  extended: " << NewFMAInt << '\n');
 
         // Extend the live interval of the addend source (it might end at the
diff --git a/llvm/test/CodeGen/PowerPC/issue116061.ll b/llvm/test/CodeGen/PowerPC/issue116061.ll
new file mode 100644
index 00000000000000..29f11fc1d3a630
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/issue116061.ll
@@ -0,0 +1,26 @@
+; RUN: llc -disable-ppc-vsx-fma-mutation=false -mcpu=pwr10 -verify-machineinstrs \
+; RUN:   -ppc-asm-full-reg-names -mtriple powerpc64-ibm-aix7.2.0.0 < %s | FileCheck %s 
+
+target datalayout = "E-m:a-Fi64-i64:64-n32:64-S128-v256:256:256-v512:512:512"
+
+define void @initial(<2 x double> %0){
+entry:
+  %1 = fmul <2 x double> %0, zeroinitializer
+  br label %for.cond251.preheader.lr.ph
+
+for.cond251.preheader.lr.ph:                      ; preds = %for.cond251.preheader.lr.ph, %entry
+  %2 = phi double [ %3, %for.cond251.preheader.lr.ph ], [ 0.000000e+00, %entry ]
+  %3 = phi double [ %7, %for.cond251.preheader.lr.ph ], [ 0.000000e+00, %entry ]
+  %add737 = fadd double %3, %2
+  %4 = insertelement <2 x double> zeroinitializer, double %add737, i64 0
+  %5 = fmul contract <2 x double> %4, zeroinitializer
+  %6 = fadd contract <2 x double> %1, %5
+  %7 = extractelement <2 x double> %6, i64 0
+  br label %for.cond251.preheader.lr.ph
+}
+
+; CHECK:        xsadddp f4, f3, f4
+; CHECK-NEXT:   xxmrghd vs5, vs4, vs2
+; CHECK-NEXT:   fmr f4, f3
+; CHECK-NEXT:   xvmaddmdp vs5, vs0, vs1
+; CHECK-NEXT:   fmr f3, f5

Copy link
Collaborator

@RolandF77 RolandF77 left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

LGTM

@diggerlin diggerlin merged commit 4d06623 into llvm:main Dec 10, 2024
8 checks passed
@kazutakahirata
Copy link
Contributor

I've fixed a warning from this PR with: 806a936

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Projects
None yet
Development

Successfully merging this pull request may close these issues.

[PowerPC] llc assert when compiler with -disable-ppc-vsx-fma-mutation=false -mcpu=pwr10
4 participants