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Wrong register used on apple-m1 #74680

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DianQK opened this issue Dec 7, 2023 · 2 comments · Fixed by #75184
Closed

Wrong register used on apple-m1 #74680

DianQK opened this issue Dec 7, 2023 · 2 comments · Fixed by #75184

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@DianQK
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DianQK commented Dec 7, 2023

I tried this IR/MIR:

; ModuleID = 'repro_117902.54923e0577e9cdaf-cgu.0'
source_filename = "repro_117902.54923e0577e9cdaf-cgu.0"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "arm64-apple-macosx11.0.0"

define i1 @foo(i32 %self.0.val, i8 %self.4.val) #1 {
start:
  switch i32 %self.0.val, label %bb2 [
    i32 0, label %bb9
    i32 1, label %bb4
    i32 2, label %bb5
    i32 3, label %bb1
  ]

bb2:                                              ; preds = %start
  unreachable

bb4:                                              ; preds = %start
  br label %bb9

bb5:                                              ; preds = %start
  br label %bb9

bb1:                                              ; preds = %start
  %trunc.not = icmp eq i8 %self.4.val, 0
  br label %bb9

bb9:                                              ; preds = %bb1, %start, %bb5, %bb4
  %r = phi i1 [ true, %bb5 ], [ true, %bb4 ], [ false, %start ], [ %trunc.not, %bb1 ]
  ret i1 %r
}

attributes #1 = { "frame-pointer"="non-leaf" "target-cpu"="apple-m1" }

I got:

_foo:                                   ; @foo
        mov     x8, x0
        mov     w0, #0                          ; =0x0
        adrp    x9, LJTI0_0@PAGE
        add     x9, x9, LJTI0_0@PAGEOFF
        adr     x10, LBB0_1
        ldrb    w11, [x9, x8]
        add     x10, x10, x11, lsl #2
        br      x10
...

If I run with -O1:

_foo:                                   ; @foo
        mov     x8, x0
        mov     w8, w0
        mov     w0, #0                          ; =0x0
        adrp    x9, LJTI0_0@PAGE
        add     x9, x9, LJTI0_0@PAGEOFF
        adr     x10, LBB0_1
        ldrb    w11, [x9, x8]
        add     x10, x10, x11, lsl #2
        br      x10

I think the first instruction should be mov w8, w0.

I'm not familiar with the MIR. But it looks like postrapseudos created mov x8, x0 in lowercopy.
Then machine-cp removes late mov w8, w0.

godbolt: https://llvm.godbolt.org/z/1hfYvrGPG
from: rust-lang/rust#117902

@llvmbot
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llvmbot commented Dec 7, 2023

@llvm/issue-subscribers-backend-aarch64

Author: DianQK (DianQK)

I tried this IR/MIR:
; ModuleID = 'repro_117902.54923e0577e9cdaf-cgu.0'
source_filename = "repro_117902.54923e0577e9cdaf-cgu.0"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "arm64-apple-macosx11.0.0"

define i1 @<!-- -->foo(i32 %self.0.val, i8 %self.4.val) #<!-- -->1 {
start:
  switch i32 %self.0.val, label %bb2 [
    i32 0, label %bb9
    i32 1, label %bb4
    i32 2, label %bb5
    i32 3, label %bb1
  ]

bb2:                                              ; preds = %start
  unreachable

bb4:                                              ; preds = %start
  br label %bb9

bb5:                                              ; preds = %start
  br label %bb9

bb1:                                              ; preds = %start
  %trunc.not = icmp eq i8 %self.4.val, 0
  br label %bb9

bb9:                                              ; preds = %bb1, %start, %bb5, %bb4
  %r = phi i1 [ true, %bb5 ], [ true, %bb4 ], [ false, %start ], [ %trunc.not, %bb1 ]
  ret i1 %r
}

attributes #<!-- -->1 = { "frame-pointer"="non-leaf" "target-cpu"="apple-m1" }

I got:

_foo:                                   ; @<!-- -->foo
        mov     x8, x0
        mov     w0, #<!-- -->0                          ; =0x0
        adrp    x9, LJTI0_0@<!-- -->PAGE
        add     x9, x9, LJTI0_0@<!-- -->PAGEOFF
        adr     x10, LBB0_1
        ldrb    w11, [x9, x8]
        add     x10, x10, x11, lsl #<!-- -->2
        br      x10
...

If I run with -O1:

_foo:                                   ; @<!-- -->foo
        mov     x8, x0
        mov     w8, w0
        mov     w0, #<!-- -->0                          ; =0x0
        adrp    x9, LJTI0_0@<!-- -->PAGE
        add     x9, x9, LJTI0_0@<!-- -->PAGEOFF
        adr     x10, LBB0_1
        ldrb    w11, [x9, x8]
        add     x10, x10, x11, lsl #<!-- -->2
        br      x10

I think the first instruction should be mov w8, w0.

I'm not familiar with the MIR. But it looks like postrapseudos created mov x8, x0 in lowercopy.
Then machine-cp removes late mov w8, w0.

godbolt: https://llvm.godbolt.org/z/1hfYvrGPG
from: rust-lang/rust#117902

@DianQK
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DianQK commented Dec 7, 2023

I tried to submit a patch #74682.

DianQK added a commit that referenced this issue Dec 14, 2023
nikic pushed a commit to rust-lang/llvm-project that referenced this issue Dec 14, 2023
@DianQK DianQK self-assigned this Mar 18, 2024
MingcongBai pushed a commit to AOSC-Tracking/llvm-project that referenced this issue Mar 26, 2024
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