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Enable the formatting workflow for llvm/clangir
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philnik777 committed Jan 9, 2024
1 parent 3adad6b commit 060d449
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Showing 23 changed files with 159 additions and 175 deletions.
2 changes: 1 addition & 1 deletion .github/workflows/pr-code-format.yml
Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,7 @@ permissions:
jobs:
code_formatter:
runs-on: ubuntu-latest
if: github.repository == 'llvm/llvm-project'
if: github.repository == 'llvm/clangir'
steps:
- name: Fetch LLVM sources
uses: actions/checkout@v4
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2 changes: 1 addition & 1 deletion clang/include/clang/CIR/Dialect/IR/CIRDialect.h
Original file line number Diff line number Diff line change
Expand Up @@ -18,9 +18,9 @@
#include "mlir/IR/BuiltinTypes.h"
#include "mlir/IR/Dialect.h"
#include "mlir/IR/OpDefinition.h"
#include "mlir/Interfaces/FunctionInterfaces.h"
#include "mlir/Interfaces/CallInterfaces.h"
#include "mlir/Interfaces/ControlFlowInterfaces.h"
#include "mlir/Interfaces/FunctionInterfaces.h"
#include "mlir/Interfaces/InferTypeOpInterface.h"
#include "mlir/Interfaces/LoopLikeInterface.h"
#include "mlir/Interfaces/SideEffectInterfaces.h"
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32 changes: 16 additions & 16 deletions clang/include/clang/CIR/Dialect/IR/CIROps.td
Original file line number Diff line number Diff line change
Expand Up @@ -1447,13 +1447,13 @@ def VTableAddrPointOp : CIR_Op<"vtable.address_point",

def SetBitfieldOp : CIR_Op<"set_bitfield"> {
let summary = "Set a bitfield";
let description = [{
The `cir.set_bitfield` operation provides a store-like access to
let description = [{
The `cir.set_bitfield` operation provides a store-like access to
a bit field of a record.

It expects an address of a storage where to store, a type of the storage,
a value being stored, a name of a bit field, a pointer to the storage in the
base record, a size of the storage, a size the bit field, an offset
base record, a size of the storage, a size the bit field, an offset
of the bit field and a sign. Returns a value being stored.

Example.
Expand Down Expand Up @@ -1496,20 +1496,20 @@ def SetBitfieldOp : CIR_Op<"set_bitfield"> {

let assemblyFormat = [{ `(`$bitfield_info`,` $dst`:`type($dst)`,`
$src`:`type($src) `)` attr-dict `->` type($result) }];

let builders = [
OpBuilder<(ins "Type":$type,
"Value":$dst,
"Type":$storage_type,
"Value":$src,
"StringRef":$name,
"unsigned":$size,
"unsigned":$size,
"unsigned":$offset,
"bool":$is_signed
),
[{
BitfieldInfoAttr info =
BitfieldInfoAttr::get($_builder.getContext(),
[{
BitfieldInfoAttr info =
BitfieldInfoAttr::get($_builder.getContext(),
name, storage_type,
size, offset, is_signed);
build($_builder, $_state, type, dst, src, info);
Expand All @@ -1523,7 +1523,7 @@ def SetBitfieldOp : CIR_Op<"set_bitfield"> {

def GetBitfieldOp : CIR_Op<"get_bitfield"> {
let summary = "Get a bitfield";
let description = [{
let description = [{
The `cir.get_bitfield` operation provides a load-like access to
a bit field of a record.

Expand Down Expand Up @@ -1561,13 +1561,13 @@ def GetBitfieldOp : CIR_Op<"get_bitfield"> {
}];

let arguments = (ins
AnyType:$addr,
AnyType:$addr,
BitfieldInfoAttr:$bitfield_info
);

let results = (outs CIR_IntType:$result);

let assemblyFormat = [{ `(`$bitfield_info `,` $addr attr-dict `:`
let assemblyFormat = [{ `(`$bitfield_info `,` $addr attr-dict `:`
type($addr) `)` `->` type($result) }];

let builders = [
Expand All @@ -1580,8 +1580,8 @@ def GetBitfieldOp : CIR_Op<"get_bitfield"> {
"bool":$is_signed
),
[{
BitfieldInfoAttr info =
BitfieldInfoAttr::get($_builder.getContext(),
BitfieldInfoAttr info =
BitfieldInfoAttr::get($_builder.getContext(),
name, storage_type,
size, offset, is_signed);
build($_builder, $_state, type, addr, info);
Expand Down Expand Up @@ -2593,19 +2593,19 @@ def CIR_InlineAsmOp : CIR_Op<"asm", [RecursiveMemoryEffects]> {

```
```mlir
cir.asm(x86_att, {"xyz"}) -> !void
cir.asm(x86_att, {"xyz"}) -> !void
```
}];

let results = (outs Optional<AnyType>:$res);

let arguments = (
ins StrAttr:$asm_string,
AsmFlavor:$asm_flavor);
AsmFlavor:$asm_flavor);

let assemblyFormat = [{
`(`$asm_flavor`,` `{` $asm_string `}` `)` attr-dict `:` type($res)
}];
}];
}

#endif // MLIR_CIR_DIALECT_CIR_OPS
2 changes: 1 addition & 1 deletion clang/include/clang/CIR/Dialect/IR/CIRTypesDetails.h
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
//===- CIRTypesDetails.h - Details of CIR dialect types -----------*- C++ -*-===//
//===- CIRTypesDetails.h - Details of CIR dialect types ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
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4 changes: 2 additions & 2 deletions clang/lib/CIR/CodeGen/CIRAsm.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -41,8 +41,8 @@ mlir::LogicalResult CIRGenFunction::buildAsmStmt(const AsmStmt &S) {

AsmDialect AsmDialect = inferDialect(CGM, S);

builder.create<mlir::cir::InlineAsmOp>(
getLoc(S.getAsmLoc()), ResultType, AsmString, AsmDialect);
builder.create<mlir::cir::InlineAsmOp>(getLoc(S.getAsmLoc()), ResultType,
AsmString, AsmDialect);

return mlir::success();
}
4 changes: 2 additions & 2 deletions clang/lib/CIR/CodeGen/CIRGenBuilder.h
Original file line number Diff line number Diff line change
Expand Up @@ -787,10 +787,10 @@ class CIRGenBuilderTy : public CIRBaseBuilderTy {
return create<mlir::cir::StackSaveOp>(loc, ty);
}

mlir::cir::StackRestoreOp createStackRestore(mlir::Location loc, mlir::Value v) {
mlir::cir::StackRestoreOp createStackRestore(mlir::Location loc,
mlir::Value v) {
return create<mlir::cir::StackRestoreOp>(loc, v);
}

};

} // namespace cir
Expand Down
10 changes: 4 additions & 6 deletions clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -194,10 +194,9 @@ CIRGenFunction::buildCoroAllocBuiltinCall(mlir::Location loc) {

mlir::cir::FuncOp fnOp;
if (!builtin) {
fnOp = CGM.createCIRFunction(
loc, CGM.builtinCoroAlloc,
mlir::cir::FuncType::get({int32Ty}, boolTy),
/*FD=*/nullptr);
fnOp = CGM.createCIRFunction(loc, CGM.builtinCoroAlloc,
mlir::cir::FuncType::get({int32Ty}, boolTy),
/*FD=*/nullptr);
assert(fnOp && "should always succeed");
fnOp.setBuiltinAttr(mlir::UnitAttr::get(builder.getContext()));
} else
Expand All @@ -217,8 +216,7 @@ CIRGenFunction::buildCoroBeginBuiltinCall(mlir::Location loc,
if (!builtin) {
fnOp = CGM.createCIRFunction(
loc, CGM.builtinCoroBegin,
mlir::cir::FuncType::get({int32Ty, VoidPtrTy},
VoidPtrTy),
mlir::cir::FuncType::get({int32Ty, VoidPtrTy}, VoidPtrTy),
/*FD=*/nullptr);
assert(fnOp && "should always succeed");
fnOp.setBuiltinAttr(mlir::UnitAttr::get(builder.getContext()));
Expand Down
2 changes: 1 addition & 1 deletion clang/lib/CIR/CodeGen/CIRGenDecl.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -892,7 +892,7 @@ struct CallCleanupFunction final : EHScopeStack::Cleanup {
/// Push the standard destructor for the given type as
/// at least a normal cleanup.
void CIRGenFunction::pushDestroy(QualType::DestructionKind dtorKind,
Address addr, QualType type) {
Address addr, QualType type) {
assert(dtorKind && "cannot push destructor for trivial type");

CleanupKind cleanupKind = getCleanupKind(dtorKind);
Expand Down
8 changes: 4 additions & 4 deletions clang/lib/CIR/CodeGen/CIRGenExpr.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -234,8 +234,8 @@ Address CIRGenFunction::getAddrOfBitFieldStorage(LValue base,

auto fieldPtr =
mlir::cir::PointerType::get(getBuilder().getContext(), fieldType);
auto sea = getBuilder().createGetMember(
loc, fieldPtr, base.getPointer(), field->getName(), index);
auto sea = getBuilder().createGetMember(loc, fieldPtr, base.getPointer(),
field->getName(), index);

return Address(sea, CharUnits::One());
}
Expand Down Expand Up @@ -341,7 +341,7 @@ LValue CIRGenFunction::buildLValueForField(LValue base,
if (!IsInPreservedAIRegion &&
(!getDebugInfo() || !rec->hasAttr<BPFPreserveAccessIndexAttr>())) {
llvm::StringRef fieldName = field->getName();
auto& layout = CGM.getTypes().getCIRGenRecordLayout(field->getParent());
auto &layout = CGM.getTypes().getCIRGenRecordLayout(field->getParent());
unsigned fieldIndex = layout.getCIRFieldNo(field);

if (CGM.LambdaFieldToName.count(field))
Expand Down Expand Up @@ -396,7 +396,7 @@ LValue CIRGenFunction::buildLValueForFieldInitialization(
if (!FieldType->isReferenceType())
return buildLValueForField(Base, Field);

auto& layout = CGM.getTypes().getCIRGenRecordLayout(Field->getParent());
auto &layout = CGM.getTypes().getCIRGenRecordLayout(Field->getParent());
unsigned FieldIndex = layout.getCIRFieldNo(Field);

Address V = buildAddrOfFieldStorage(*this, Base.getAddress(), Field,
Expand Down
71 changes: 35 additions & 36 deletions clang/lib/CIR/CodeGen/CIRGenExprAgg.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -60,37 +60,36 @@ static bool isBlockVarRef(const Expr *E) {
// FIXME: pointer arithmetic?
return false;

// Check both sides of a conditional operator.
} else if (const AbstractConditionalOperator *op
= dyn_cast<AbstractConditionalOperator>(E)) {
return isBlockVarRef(op->getTrueExpr())
|| isBlockVarRef(op->getFalseExpr());

// OVEs are required to support BinaryConditionalOperators.
} else if (const OpaqueValueExpr *op
= dyn_cast<OpaqueValueExpr>(E)) {
// Check both sides of a conditional operator.
} else if (const AbstractConditionalOperator *op =
dyn_cast<AbstractConditionalOperator>(E)) {
return isBlockVarRef(op->getTrueExpr()) ||
isBlockVarRef(op->getFalseExpr());

// OVEs are required to support BinaryConditionalOperators.
} else if (const OpaqueValueExpr *op = dyn_cast<OpaqueValueExpr>(E)) {
if (const Expr *src = op->getSourceExpr())
return isBlockVarRef(src);

// Casts are necessary to get things like (*(int*)&var) = foo().
// We don't really care about the kind of cast here, except
// we don't want to look through l2r casts, because it's okay
// to get the *value* in a __block variable.
// Casts are necessary to get things like (*(int*)&var) = foo().
// We don't really care about the kind of cast here, except
// we don't want to look through l2r casts, because it's okay
// to get the *value* in a __block variable.
} else if (const CastExpr *cast = dyn_cast<CastExpr>(E)) {
if (cast->getCastKind() == CK_LValueToRValue)
return false;
return isBlockVarRef(cast->getSubExpr());

// Handle unary operators. Again, just aggressively look through
// it, ignoring the operation.
// Handle unary operators. Again, just aggressively look through
// it, ignoring the operation.
} else if (const UnaryOperator *uop = dyn_cast<UnaryOperator>(E)) {
return isBlockVarRef(uop->getSubExpr());

// Look into the base of a field access.
// Look into the base of a field access.
} else if (const MemberExpr *mem = dyn_cast<MemberExpr>(E)) {
return isBlockVarRef(mem->getBase());

// Look into the base of a subscript.
// Look into the base of a subscript.
} else if (const ArraySubscriptExpr *sub = dyn_cast<ArraySubscriptExpr>(E)) {
return isBlockVarRef(sub->getBase());
}
Expand All @@ -113,7 +112,8 @@ class AggExprEmitter : public StmtVisitor<AggExprEmitter> {
llvm::function_ref<RValue(ReturnValueSlot)> Fn);

AggValueSlot EnsureSlot(mlir::Location loc, QualType T) {
if (!Dest.isIgnored()) return Dest;
if (!Dest.isIgnored())
return Dest;
return CGF.CreateAggTemp(T, loc, "agg.tmp.ensured");
}

Expand Down Expand Up @@ -213,11 +213,11 @@ class AggExprEmitter : public StmtVisitor<AggExprEmitter> {
// For an assignment to work, the value on the right has
// to be compatible with the value on the left.
assert(CGF.getContext().hasSameUnqualifiedType(E->getLHS()->getType(),
E->getRHS()->getType())
&& "Invalid assignment");
E->getRHS()->getType()) &&
"Invalid assignment");

if (isBlockVarRef(E->getLHS()) &&
E->getRHS()->HasSideEffects(CGF.getContext())) {
E->getRHS()->HasSideEffects(CGF.getContext())) {
llvm_unreachable("NYI");
}

Expand All @@ -233,12 +233,11 @@ class AggExprEmitter : public StmtVisitor<AggExprEmitter> {

// Codegen the RHS so that it stores directly into the LHS.
AggValueSlot lhsSlot = AggValueSlot::forLValue(
lhs, AggValueSlot::IsDestructed, AggValueSlot::DoesNotNeedGCBarriers,
AggValueSlot::IsAliased, AggValueSlot::MayOverlap);
lhs, AggValueSlot::IsDestructed, AggValueSlot::DoesNotNeedGCBarriers,
AggValueSlot::IsAliased, AggValueSlot::MayOverlap);

// A non-volatile aggregate destination might have volatile member.
if (!lhsSlot.isVolatile() &&
CGF.hasVolatileMember(E->getLHS()->getType()))
if (!lhsSlot.isVolatile() && CGF.hasVolatileMember(E->getLHS()->getType()))
assert(!UnimplementedFeature::atomicTypes());

CGF.buildAggExpr(E->getRHS(), lhsSlot);
Expand All @@ -247,10 +246,10 @@ class AggExprEmitter : public StmtVisitor<AggExprEmitter> {
buildFinalDestCopy(E->getType(), lhs);

if (!Dest.isIgnored() && !Dest.isExternallyDestructed() &&
E->getType().isDestructedType() == QualType::DK_nontrivial_c_struct)
E->getType().isDestructedType() == QualType::DK_nontrivial_c_struct)
CGF.pushDestroy(QualType::DK_nontrivial_c_struct, Dest.getAddress(),
E->getType());
}
E->getType());
}

void VisitBinComma(const BinaryOperator *E) { llvm_unreachable("NYI"); }
void VisitBinCmp(const BinaryOperator *E) { llvm_unreachable("NYI"); }
Expand Down Expand Up @@ -356,8 +355,8 @@ void AggExprEmitter::buildFinalDestCopy(QualType type, const LValue &src,
assert(!UnimplementedFeature::volatileTypes());

if (SrcValueKind == EVK_RValue) {
if (type.isNonTrivialToPrimitiveDestructiveMove() == QualType::PCK_Struct) {
llvm_unreachable("move assignment/move ctor for rvalue is NYI");
if (type.isNonTrivialToPrimitiveDestructiveMove() == QualType::PCK_Struct) {
llvm_unreachable("move assignment/move ctor for rvalue is NYI");
}
} else {
if (type.isNonTrivialToPrimitiveCopy() == QualType::PCK_Struct)
Expand Down Expand Up @@ -672,8 +671,8 @@ void AggExprEmitter::VisitLambdaExpr(LambdaExpr *E) {
}

// Emit initialization
LValue LV = CGF.buildLValueForFieldInitialization(
SlotLV, *CurField, fieldName);
LValue LV =
CGF.buildLValueForFieldInitialization(SlotLV, *CurField, fieldName);
if (CurField->hasCapturedVLAType()) {
llvm_unreachable("NYI");
}
Expand Down Expand Up @@ -820,8 +819,8 @@ void AggExprEmitter::withReturnValueSlot(
if (!UseTemp) {
RetAddr = Dest.getAddress();
} else {
RetAddr = CGF.CreateMemTemp(RetTy, CGF.getLoc(E->getSourceRange()),
"tmp", &RetAddr);
RetAddr = CGF.CreateMemTemp(RetTy, CGF.getLoc(E->getSourceRange()), "tmp",
&RetAddr);
assert(!UnimplementedFeature::shouldEmitLifetimeMarkers() && "NYI");
}

Expand Down Expand Up @@ -940,8 +939,8 @@ void AggExprEmitter::VisitCXXParenListOrInitListExpr(
if (curInitIndex == NumInitElements && Dest.isZeroed() &&
CGF.getTypes().isZeroInitializable(ExprToVisit->getType()))
break;
LValue LV = CGF.buildLValueForFieldInitialization(
DestLV, field, field->getName());
LValue LV =
CGF.buildLValueForFieldInitialization(DestLV, field, field->getName());
// We never generate write-barries for initialized fields.
assert(!UnimplementedFeature::setNonGC());

Expand Down
7 changes: 3 additions & 4 deletions clang/lib/CIR/CodeGen/CIRGenExprConst.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -907,7 +907,7 @@ class ConstExprEmitter
// Look through the temporary; it's just converting the value to an lvalue
// to pass it to the constructor.
if (auto *MTE = dyn_cast<MaterializeTemporaryExpr>(Arg))
return Visit(MTE->getSubExpr(), Ty);
return Visit(MTE->getSubExpr(), Ty);
// Don't try to support arbitrary lvalue-to-rvalue conversions for now.
return nullptr;
}
Expand Down Expand Up @@ -1074,8 +1074,7 @@ class ConstantLValueEmitter
ConstantLValue applyOffset(ConstantLValue &C) {

// Handle attribute constant LValues.
if (auto Attr =
C.Value.dyn_cast<mlir::Attribute>()) {
if (auto Attr = C.Value.dyn_cast<mlir::Attribute>()) {
if (auto GV = Attr.dyn_cast<mlir::cir::GlobalViewAttr>()) {
auto baseTy = GV.getType().cast<mlir::cir::PointerType>().getPointee();
auto destTy = CGM.getTypes().convertTypeForMem(DestType);
Expand Down Expand Up @@ -1338,7 +1337,7 @@ mlir::Attribute ConstantEmitter::tryEmitPrivateForVarInit(const VarDecl &D) {
}
InConstantContext = D.hasConstantInitialization();

const Expr * E = D.getInit();
const Expr *E = D.getInit();
assert(E && "No initializer to emit");

QualType destType = D.getType();
Expand Down
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