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Promote shift RHS to vectors if needed (#4781)
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Fixes #3606.
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kinke authored Nov 14, 2024
1 parent c32c7ee commit ad4372c
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Showing 4 changed files with 25 additions and 177 deletions.
1 change: 1 addition & 0 deletions CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,7 @@
- Fix potentially corrupt IR layouts for bit fields. (#4646, #4708)
- Fix potentially corrupt IR layouts for explicitly under-aligned aggregates, a regression introduced in LDC v1.31. (#4734, #4736)
- ELF: Emit (most) instantiated symbols in COMDATs for proper link-time culling. (#3589, #4748)
- Support scalar right-hand-sides when bit-shifting vectors. (#3606, #4781)

# LDC 1.39.0 (2024-07-04)

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191 changes: 19 additions & 172 deletions dmd/expressionsem.d
Original file line number Diff line number Diff line change
Expand Up @@ -13016,9 +13016,8 @@ version (IN_LLVM)
return;
}

override void visit(ShlExp exp)
private void visitShift(BinExp exp)
{
//printf("ShlExp::semantic(), type = %p\n", type);
if (exp.type)
{
result = exp;
Expand All @@ -13045,87 +13044,32 @@ version (IN_LLVM)
result = exp.incompatibleTypes();
return;
}

exp.e1 = integralPromotions(exp.e1, sc);
if (exp.e2.type.toBasetype().ty != Tvector)
exp.e2 = exp.e2.castTo(sc, Type.tshiftcnt);
{
Type tb1 = exp.e1.type.toBasetype();
exp.e2 = exp.e2.castTo(sc, tb1.ty == Tvector ? tb1 : Type.tshiftcnt);
}

exp.type = exp.e1.type;
result = exp;
}

override void visit(ShlExp exp)
{
visitShift(exp);
}
override void visit(ShrExp exp)
{
if (exp.type)
{
result = exp;
return;
}

if (Expression ex = binSemanticProp(exp, sc))
{
result = ex;
return;
}
Expression e = exp.op_overload(sc);
if (e)
{
result = e;
return;
}

if (exp.checkIntegralBin() || exp.checkSharedAccessBin(sc))
return setError();

if (!target.isVectorOpSupported(exp.e1.type.toBasetype(), exp.op, exp.e2.type.toBasetype()))
{
result = exp.incompatibleTypes();
return;
}
exp.e1 = integralPromotions(exp.e1, sc);
if (exp.e2.type.toBasetype().ty != Tvector)
exp.e2 = exp.e2.castTo(sc, Type.tshiftcnt);

exp.type = exp.e1.type;
result = exp;
visitShift(exp);
}

override void visit(UshrExp exp)
{
if (exp.type)
{
result = exp;
return;
}

if (Expression ex = binSemanticProp(exp, sc))
{
result = ex;
return;
}
Expression e = exp.op_overload(sc);
if (e)
{
result = e;
return;
}

if (exp.checkIntegralBin() || exp.checkSharedAccessBin(sc))
return setError();

if (!target.isVectorOpSupported(exp.e1.type.toBasetype(), exp.op, exp.e2.type.toBasetype()))
{
result = exp.incompatibleTypes();
return;
}
exp.e1 = integralPromotions(exp.e1, sc);
if (exp.e2.type.toBasetype().ty != Tvector)
exp.e2 = exp.e2.castTo(sc, Type.tshiftcnt);

exp.type = exp.e1.type;
result = exp;
visitShift(exp);
}

override void visit(AndExp exp)
private void visitBinaryBitOp(BinExp exp)
{
if (exp.type)
{
Expand Down Expand Up @@ -13180,114 +13124,17 @@ version (IN_LLVM)
result = exp;
}

override void visit(AndExp exp)
{
visitBinaryBitOp(exp);
}
override void visit(OrExp exp)
{
if (exp.type)
{
result = exp;
return;
}

if (Expression ex = binSemanticProp(exp, sc))
{
result = ex;
return;
}
Expression e = exp.op_overload(sc);
if (e)
{
result = e;
return;
}

if (exp.e1.type.toBasetype().ty == Tbool && exp.e2.type.toBasetype().ty == Tbool)
{
exp.type = exp.e1.type;
result = exp;
return;
}

if (Expression ex = typeCombine(exp, sc))
{
result = ex;
return;
}

Type tb = exp.type.toBasetype();
if (tb.ty == Tarray || tb.ty == Tsarray)
{
if (!isArrayOpValid(exp))
{
result = arrayOpInvalidError(exp);
return;
}
result = exp;
return;
}
if (!target.isVectorOpSupported(tb, exp.op, exp.e2.type.toBasetype()))
{
result = exp.incompatibleTypes();
return;
}
if (exp.checkIntegralBin() || exp.checkSharedAccessBin(sc))
return setError();

result = exp;
visitBinaryBitOp(exp);
}

override void visit(XorExp exp)
{
if (exp.type)
{
result = exp;
return;
}

if (Expression ex = binSemanticProp(exp, sc))
{
result = ex;
return;
}
Expression e = exp.op_overload(sc);
if (e)
{
result = e;
return;
}

if (exp.e1.type.toBasetype().ty == Tbool && exp.e2.type.toBasetype().ty == Tbool)
{
exp.type = exp.e1.type;
result = exp;
return;
}

if (Expression ex = typeCombine(exp, sc))
{
result = ex;
return;
}

Type tb = exp.type.toBasetype();
if (tb.ty == Tarray || tb.ty == Tsarray)
{
if (!isArrayOpValid(exp))
{
result = arrayOpInvalidError(exp);
return;
}
result = exp;
return;
}
if (!target.isVectorOpSupported(tb, exp.op, exp.e2.type.toBasetype()))
{
result = exp.incompatibleTypes();
return;
}
if (exp.checkIntegralBin() || exp.checkSharedAccessBin(sc))
return setError();

result = exp;
visitBinaryBitOp(exp);
}

override void visit(LogicalExp exp)
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5 changes: 0 additions & 5 deletions dmd/target.d
Original file line number Diff line number Diff line change
Expand Up @@ -794,11 +794,6 @@ static if (!IN_LLVM)
if (!IN_LLVM && vecsize != 16 && vecsize != 32)
return false;

// LDC_FIXME:
// Most of the binops only work with `t2` being the same IR type as `tvec`
// (LLVM restriction). We'd need to be more strict here and/or convert
// the rhs to a matching type during codegen (e.g., promote scalars to
// vectors).
bool supported = false;
switch (op)
{
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5 changes: 5 additions & 0 deletions tests/codegen/vector_ops.d
Original file line number Diff line number Diff line change
Expand Up @@ -44,6 +44,11 @@ void main()

const int4 i = [ 1, 2, 3, 4 ];
assert(i << i is [ 2, 8, 24, 64 ]);
assert(i << 2 is [ 4, 8, 12, 16 ]);
assert(i >> int4(1) is [ 0, 1, 1, 2 ]);
assert(i >> 1 is [ 0, 1, 1, 2 ]);
assert(i >>> int4(1) is [ 0, 1, 1, 2 ]);
assert(i >>> 1 is [ 0, 1, 1, 2 ]);

const int4 a = [ 0b1, 0b10, 0b101, 0b100011 ];
const int4 b = 0b110;
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