Maquina++

What is it?

Maquina++ (Machine++) is a FURB University's project released in 2003. It was initially created by Jonathan Manoel Borges, who created the entire microcontroller and his assembler, with orientation of professor Miguel Alexandre Wisintainer. This was the first version of the project that is used untill now as an academic tool. In 2014 it was rewriten and improved on the Logisim digital simulator.

Caracteristics

• 8-bit RAM bus
• 8-bit Data bus
• 16-bit ROM bus
• 4 input bus
• 4 output bus
• 10 ULA operations instruction set (logic and arithmetic)
• 5 jump operations
• Assembly-like language
• EOI flag
• Carry flag
• Zero flag
• 4 8-bit registers (B-E) + 8-bit Accumulator(A)

15 operations, 8 bits?

In the initial project, there was 3 bits that identify the ALU operation code. The controller module gained one extra bit to address the instruction register, so we could use 15 positions. This bit is set with a special instruction called High Decoder, this instruction is generated by the assembler and the assembly programmer don't need to care about that. With the rewrite and improvement in 2014 was added a counter with 5 bits to the controller, then we could use all the instruction register positions. The HD counter is incremented with successive calls to High decoder operation, it acts like a page marker, if i want a instruction that is on the 3rd page, i say "turn the page 3 times", then i say, "use the 2nd instruction on this page" for example.

How to write instructions?

In binary, the bits of the instructions are separated like

ALU Operation	Register / I\O Port	Operation Flow
000	00	000

Intruction set

Code	Name
000	ADD
001	SUB
010	AND
011	OR
100	XOR
101	NOT
110	MOV
111	INC

Operation flow table

Code page	Code	Name
00000	000	A -> A
00000	001	A -> Register
00000	010	A -> RAM
00000	011	A -> OUT
00000	100	Register -> A
00000	101	RAM -> A
00000	110	IN -> A
00000	111	High decoder
00001	000	ROM -> A
00001	001	ROM -> Register
00001	010	ROM -> RAM
00001	011	JMP
00001	100	JMPC
00001	101	JMPZ
00001	110	CALL
00010	000	RET
00010	001	DRAM -> A
00010	010	A -> DRAM
00010	011	PUSH
00010	100	POP
00010	101	PUSHA
00010	110	POPA

^{* All the instruction with code 111 in all code pages are High decoder instructions}

Registers's addresses

Code	Name
00	B
01	C
10	D
11	E

Oh, I prefer to write code in assembly language...

No problem!

The Assembler.jar file is a Java assembler that compiles source to the Logisim's memory map format, so you can write code and import it to simulation. Some basic examples:

Print hexa 44 on OUT1

loop:
    MOV 44,A;
    MOV A,OUT1;
JMP loop;

SUM hexa 55 and hexa 66

loop:
    MOV 55,A;
    MOV 66,B;
    ADD B,A;
    MOV A,OUT1;
JMP loop;

Function calls

loop:
    MOV 55,A;
    MOV 66,B;
    CALL SUM;
    JMP LOOP;
    SUM:
        ADD A,B;
        RET;
JMP loop;

MOV flows

MOV 11,B;
MOV 11,C;
MOV 11,D;
MOV 11,E;
MOV B,A;
MOV C,A;
MOV D,A;
MOV E,A;
MOV A,OUT1;
MOV E,A
MOV A,OUT2;
loop:
JMP LOOP;

Multiple lables

INICIO:
    JMP LOOPA;
    MOV 11,B;
    MOV 11,B;
LOOPA:
    JMP LOOPB;
    MOV 11,B;
    MOV 11,B;
LOOPB:
    JMP LOOPC;
    MOV 11,B;
    MOV 11,B;
LOOPC:
    JMP INICIO;

RAM access

MOV 33,A;
MOV A,#00;
MOV #00,A;
MOV A,OUT1;

Turn on off

MOV IN0,A;
AND 32,A;
JMPZ OFF;
ON:
    MOV 01,A;
    MOV A,OUT1;
    JMP END;
OFF:
    MOV 00,A;
    MOV A,OUT1;
END:
    JMP END;

Dynamic memory access - Sets hex 01 to first 10 addresses of the RAM

MOV 00,B;
LOOP:
    MOV 01,A;
    MOV A,#B;
    MOV B,A;
    INC A,A;
    MOV A,B;
    SUB 0A,B;
    JMPZ EXIT;
    MOV A,B;
JMP LOOP;
EXIT:
    JMP EXIT;