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Use Linear Layout to describe 2D block loads #3487

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This PR introduces a new linear layout in the Triton Load to LLVM lowering for block loads. The layout describes the block load in terms of three input parameters:

  • offset which is the 1D offset into the loaded data for a single DPAS invocation inside a sub-group
  • iteration which identifies the DPAS invocation when multiple DPAS invocations share a single load
  • load which identifies the load index when multiple loads occur for a given operand

The output of the layout function identifies the global (x,y) tensor coordinate. This was designed to allow composition of the DPAS layout and the load layout to go from offset, iteration, load to block, warp, lane, register or vice versa. Note that I do not encode all the information about the load into the layout currently - I wanted to maintain surjective properties of the layout and it's a bit easier to construct this way. So, sometimes a manual offset must be applied depending on the desired layout parameter.

Currently the block load / tile layout is implemented within the existing loop structure. But, the layout was designed to be used to generate the 2D block loads. I left the existing loop structure in-place along with lots of debug info so we can more easily check any regressions. I am planning to remove the existing loop structure and generate loads only using layout parameters in a follow-up PR.

Close #3008

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Add tile size abstraction in tensor ptr TTGIR to LLVM lowering
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