Upgrade to nightly-2022-06-25

Dockerfile

@@ -5,7 +5,7 @@ ENV RUSTUP_HOME=/usr/local/rustup \
     CARGO_HOME=/usr/local/cargo \
     PATH=/usr/local/cargo/bin:$PATH \
     # Manually sync this with rust-toolchain.toml!
-    RUST_VERSION=nightly-2022-04-24 \
+    RUST_VERSION=nightly-2022-06-25 \
     RUST_COMPONENTS="clippy llvm-tools-preview rustfmt rust-src" \
     RUST_TARGETS="x86_64-unknown-none"
 

rust-toolchain.toml

@@ -1,6 +1,6 @@
 [toolchain]
 # Manually sync this with Dockerfile!
-channel = "nightly-2022-05-15"
+channel = "nightly-2022-06-25"
 components = [
     "clippy",
     "llvm-tools-preview",

src/arch/x86_64/kernel/pci.rs

@@ -48,7 +48,7 @@ static mut PCI_ADAPTERS: Vec<PciAdapter> = Vec::new();
 static mut PCI_DRIVERS: Vec<PciDriver<'_>> = Vec::new();
 
 /// Classes of PCI nodes.
-#[derive(Copy, Clone, Debug, FromPrimitive, ToPrimitive, PartialEq)]
+#[derive(Copy, Clone, Debug, FromPrimitive, ToPrimitive, PartialEq, Eq)]
 pub enum PciClassCode {
 	TooOld = 0x00,
 	MassStorage = 0x01,
@@ -71,7 +71,7 @@ pub enum PciClassCode {
 }
 
 /// Network Controller Sub Classes
-#[derive(Copy, Clone, Debug, FromPrimitive, ToPrimitive, PartialEq)]
+#[derive(Copy, Clone, Debug, FromPrimitive, ToPrimitive, PartialEq, Eq)]
 pub enum PciNetworkControllerSubclass {
 	Ethernet = 0x00,
 	TokenRing = 0x01,

src/drivers/net/virtio_net.rs

@@ -1550,7 +1550,7 @@ pub mod constants {
 	/// wrapping a u64.
 	///
 	/// The main functionality of this type are functions implemented on it.
-	#[derive(Debug, Copy, Clone, PartialOrd, PartialEq)]
+	#[derive(Debug, Copy, Clone, PartialOrd, PartialEq, Eq)]
 	pub struct FeatureSet(u64);
 
 	impl BitOr for FeatureSet {

src/drivers/virtio/mod.rs

@@ -60,7 +60,7 @@ pub mod features {
 	/// Virtio's feature bits inside an enum.
 	/// See Virtio specification v1.1. - 6
 	#[allow(dead_code, non_camel_case_types)]
-	#[derive(Clone, Copy, Debug, PartialEq)]
+	#[derive(Clone, Copy, Debug, PartialEq, Eq)]
 	#[repr(u64)]
 	pub enum Features {
 		VIRTIO_F_RING_INDIRECT_DESC = 1 << 28,

src/drivers/virtio/transport/pci.rs

@@ -88,7 +88,7 @@ impl From<u16> for DevId {
 // implementation, in order catch all cases correctly,
 // as this function uses the catch-all "_" case!
 #[allow(dead_code, non_camel_case_types, clippy::upper_case_acronyms)]
-#[derive(Copy, Clone, PartialEq)]
+#[derive(Copy, Clone, PartialEq, Eq)]
 #[repr(u8)]
 pub enum CfgType {
 	INVALID = 0,

src/drivers/virtio/virtqueue/mod.rs

@@ -35,7 +35,7 @@ use core::ops::{BitAnd, Deref, DerefMut};
 /// smaller-equal to `min(u16::MAX , T::MAX)`.
 ///
 /// Currently implements `From<u16>` and `From<u32>`.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq, Eq)]
 pub struct VqIndex(u16);
 
 impl From<u16> for VqIndex {
@@ -64,7 +64,7 @@ impl From<u32> for VqIndex {
 /// smaller-equal to `min(u16::MAX , T::MAX)`.
 ///
 /// Currently implements `From<u16>` and `From<u32>`.
-#[derive(Copy, Clone, Debug, PartialOrd, PartialEq)]
+#[derive(Copy, Clone, Debug, PartialOrd, PartialEq, Eq)]
 pub struct VqSize(u16);
 
 impl From<u16> for VqSize {