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LPC55: FreeRTOS fix #2688

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merged 2 commits into from
Jul 12, 2024
Merged

LPC55: FreeRTOS fix #2688

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b82e0a9
update lpc55 bsp for rtos use.
HiFiPhile Jun 27, 2024
fbe0251
Make FreeRTOS config work with Cortex-M33.
HiFiPhile Jun 27, 2024
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1 change: 1 addition & 0 deletions examples/device/audio_4_channel_mic_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
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Original file line number Diff line number Diff line change
Expand Up @@ -67,6 +67,7 @@
#define configENABLE_FPU 1
#define configENABLE_TRUSTZONE 0
#define configMINIMAL_SECURE_STACK_SIZE ( 1024 )
#define configRUN_FREERTOS_SECURE_ONLY 1

#define configUSE_PREEMPTION 1
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
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1 change: 1 addition & 0 deletions examples/device/audio_test_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
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Expand Up @@ -67,6 +67,7 @@
#define configENABLE_FPU 1
#define configENABLE_TRUSTZONE 0
#define configMINIMAL_SECURE_STACK_SIZE ( 1024 )
#define configRUN_FREERTOS_SECURE_ONLY 1

#define configUSE_PREEMPTION 1
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
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1 change: 1 addition & 0 deletions examples/device/cdc_msc_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
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Original file line number Diff line number Diff line change
Expand Up @@ -67,6 +67,7 @@
#define configENABLE_FPU 1
#define configENABLE_TRUSTZONE 0
#define configMINIMAL_SECURE_STACK_SIZE ( 1024 )
#define configRUN_FREERTOS_SECURE_ONLY 1

#define configUSE_PREEMPTION 1
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
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1 change: 1 addition & 0 deletions examples/device/hid_composite_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
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Original file line number Diff line number Diff line change
Expand Up @@ -67,6 +67,7 @@
#define configENABLE_FPU 1
#define configENABLE_TRUSTZONE 0
#define configMINIMAL_SECURE_STACK_SIZE ( 1024 )
#define configRUN_FREERTOS_SECURE_ONLY 1

#define configUSE_PREEMPTION 1
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
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1 change: 1 addition & 0 deletions hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h
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Expand Up @@ -52,6 +52,7 @@
#define configENABLE_FPU 1
#define configENABLE_TRUSTZONE 0
#define configMINIMAL_SECURE_STACK_SIZE (1024)
#define configRUN_FREERTOS_SECURE_ONLY 1

#define configUSE_PREEMPTION 1
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
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11 changes: 10 additions & 1 deletion hw/bsp/lpc55/family.c
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Expand Up @@ -120,12 +120,17 @@ void board_init(void) {
// Init 96 MHz clock
BootClockFROHF96M();

#if CFG_TUSB_OS == OPT_OS_NONE
// 1ms tick timer
SysTick_Config(SystemCoreClock / 1000);

#if CFG_TUSB_OS == OPT_OS_FREERTOS
#elif CFG_TUSB_OS == OPT_OS_FREERTOS
// Explicitly disable systick to prevent its ISR runs before scheduler start
SysTick->CTRL &= ~1U;

// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
NVIC_SetPriority(USB1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
#endif

// Init all GPIO ports
Expand Down Expand Up @@ -239,6 +244,10 @@ void board_init(void) {
// phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK);
// phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06);
// USBPHY->TX = phytx;

ARM_MPU_SetMemAttr(0, 0x44); // Normal memory, non-cacheable (inner and outer)
ARM_MPU_SetRegion(0, ARM_MPU_RBAR(0x40100000, ARM_MPU_SH_NON, 0, 1, 1), ARM_MPU_RLAR(0x40104000, 0));
ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk | MPU_CTRL_HFNMIENA_Msk);
#endif
}

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