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Add a VAES-optimized AES-GCM implementation that is optimized for AMD Zen 3 processors, using AVX2 instead of AVX512 / AVX10. With AVX2 only 16 vector registers are available and some instructions are missing, which is inconvenient and makes the code not easily sharable with the AVX512 / AVX10 version. However, using VAES still gives a significant performance improvement, about 80-85% on long messages as shown by the following tables which show the change in AES-256-GCM throughput in MB/s on a Zen 3 "Milan" processor for various message lengths in bytes. Encryption: | 16384 | 4096 | 4095 | 1420 | 512 | 500 | --------+-------+-------+-------+-------+-------+-------+ Before | 3955 | 3749 | 3597 | 3054 | 2411 | 2038 | After | 7128 | 6631 | 5975 | 4788 | 3807 | 2676 | | 300 | 200 | 64 | 63 | 16 | --------+-------+-------+-------+-------+-------+ Before | 1757 | 1405 | 856 | 602 | 356 | After | 1885 | 1430 | 940 | 593 | 381 | Decryption: | 16384 | 4096 | 4095 | 1420 | 512 | 500 | --------+-------+-------+-------+-------+-------+-------+ Before | 3962 | 3774 | 3593 | 2978 | 2510 | 1998 | After | 7378 | 6836 | 6282 | 4826 | 3868 | 2753 | | 300 | 200 | 64 | 63 | 16 | --------+-------+-------+-------+-------+-------+ Before | 1742 | 1428 | 856 | 535 | 383 | After | 1940 | 1534 | 940 | 573 | 383 | Change-Id: I583dd6b48b81ab3c6df51bfe8729366cad500537 Reviewed-on: https://boringssl-review.googlesource.com/c/boringssl/+/74368 Reviewed-by: David Benjamin <[email protected]> Commit-Queue: David Benjamin <[email protected]>
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