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cmd/asm: add x86 AMX instructions #61782

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724506b
cmd/asm: add x86 AMX instructions
anton-kuklin Aug 5, 2023
b9d92a6
added HasAMX flag
anton-kuklin Aug 7, 2023
7c93300
fix flag
anton-kuklin Aug 7, 2023
0ee3f58
added TILEZERO & TILERELEASE
anton-kuklin Aug 8, 2023
44191b4
renamed regiter to Ytm
anton-kuklin Aug 8, 2023
e5e426b
defined tmm registers
anton-kuklin Aug 8, 2023
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9 changes: 9 additions & 0 deletions src/cmd/internal/obj/x86/a.out.go
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Original file line number Diff line number Diff line change
Expand Up @@ -202,6 +202,15 @@ const (
REG_Z30
REG_Z31

REG_TM0
REG_TM1
REG_TM2
REG_TM3
REG_TM4
REG_TM5
REG_TM6
REG_TM7

REG_CS
REG_SS
REG_DS
Expand Down
12 changes: 12 additions & 0 deletions src/cmd/internal/obj/x86/aenum.go
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12 changes: 12 additions & 0 deletions src/cmd/internal/obj/x86/anames.go
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19 changes: 15 additions & 4 deletions src/cmd/internal/obj/x86/asm6.go
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Expand Up @@ -192,6 +192,7 @@ const (
Ytextsize
Yindir
Ymax
Ytm
)

const (
Expand Down Expand Up @@ -315,10 +316,6 @@ const (
// The P, L, and W fields are chosen to match
// their eventual locations in the VEX prefix bytes.

// Encoding for VEX prefix in tables.
// The P, L, and W fields are chosen to match
// their eventual locations in the VEX prefix bytes.

// Using spare bit to make leading [E]VEX encoding byte different from
// 0x0f even if all other VEX fields are 0.
avxEscape = 1 << 6
Expand Down Expand Up @@ -2471,6 +2468,10 @@ func instinit(ctxt *obj.Link) {
}
}

if i >= REG_TM0 && i <= REG_TM0+7 {
reg[i] = (i - REG_TM0) & 7
}

if i >= REG_CR+8 && i <= REG_CR+15 {
regrex[i] = Rxr
}
Expand Down Expand Up @@ -3081,6 +3082,16 @@ func oclass(ctxt *obj.Link, p *obj.Prog, a *obj.Addr) int {
}
return Yzr

case REG_TM0 + 0,
REG_TM0 + 1,
REG_TM0 + 2,
REG_TM0 + 3,
REG_TM0 + 4,
REG_TM0 + 5,
REG_TM0 + 6,
REG_TM0 + 7:
return Ytm

case REG_K0:
return Yk0

Expand Down
60 changes: 60 additions & 0 deletions src/cmd/internal/obj/x86/avx_optabs.go
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1 change: 1 addition & 0 deletions src/internal/cpu/cpu.go
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Expand Up @@ -29,6 +29,7 @@ var X86 struct {
HasADX bool
HasAVX bool
HasAVX2 bool
HasAMX bool
HasBMI1 bool
HasBMI2 bool
HasERMS bool
Expand Down
8 changes: 6 additions & 2 deletions src/internal/cpu/cpu_x86.go
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Expand Up @@ -41,6 +41,9 @@ const (
cpuid_ADX = 1 << 19
cpuid_SHA = 1 << 29

// edx bits
cpuid_AMX = 1 << 24

// edx bits for CPUID 0x80000001
cpuid_RDTSCP = 1 << 27
)
Expand Down Expand Up @@ -73,6 +76,7 @@ func doinit() {
options = append(options,
option{Name: "avx", Feature: &X86.HasAVX},
option{Name: "avx2", Feature: &X86.HasAVX2},
option{Name: "amx", Feature: &X86.HasAMX},
option{Name: "bmi1", Feature: &X86.HasBMI1},
option{Name: "bmi2", Feature: &X86.HasBMI2},
option{Name: "fma", Feature: &X86.HasFMA})
Expand Down Expand Up @@ -121,14 +125,14 @@ func doinit() {
return
}

_, ebx7, _, _ := cpuid(7, 0)
_, ebx7, _, edx7 := cpuid(7, 0)
X86.HasBMI1 = isSet(ebx7, cpuid_BMI1)
X86.HasAVX2 = isSet(ebx7, cpuid_AVX2) && osSupportsAVX
X86.HasAMX = isSet(edx7, cpuid_AMX)
X86.HasBMI2 = isSet(ebx7, cpuid_BMI2)
X86.HasERMS = isSet(ebx7, cpuid_ERMS)
X86.HasADX = isSet(ebx7, cpuid_ADX)
X86.HasSHA = isSet(ebx7, cpuid_SHA)

var maxExtendedInformation uint32
maxExtendedInformation, _, _, _ = cpuid(0x80000000, 0)

Expand Down