Skip to content

Commit

Permalink
feat: collect ir loops
Browse files Browse the repository at this point in the history
  • Loading branch information
ganyao114 committed Dec 13, 2023
1 parent 1620678 commit 6d20d06
Show file tree
Hide file tree
Showing 15 changed files with 190 additions and 39 deletions.
10 changes: 10 additions & 0 deletions source/runtime/backend/arm64/jit/jit_context.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -20,6 +20,16 @@ VRegister JitContext::V(const ir::Value& value) {
return VRegister::GetVRegFromCode(reg.id);
}

Register JitContext::GetTmpX(const ir::Value& value) {
auto reg = reg_alloc.GetTmpGPR();
return XRegister::GetXRegFromCode(reg.id);
}

VRegister JitContext::GetTmpV(const ir::Value& value) {
auto reg = reg_alloc.GetTmpFPR();
return VRegister::GetVRegFromCode(reg.id);
}

void JitContext::Forward(ir::Location location) {

}
Expand Down
3 changes: 3 additions & 0 deletions source/runtime/backend/arm64/jit/jit_context.h
Original file line number Diff line number Diff line change
Expand Up @@ -24,6 +24,9 @@ class JitContext : DeleteCopyAndMove {
Register X(const ir::Value &value);
VRegister V(const ir::Value &value);

Register GetTmpX(const ir::Value &value);
VRegister GetTmpV(const ir::Value &value);

void Forward(ir::Location location);
void Forward(const Register &location);
void Finish();
Expand Down
1 change: 1 addition & 0 deletions source/runtime/backend/reg_alloc.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -44,6 +44,7 @@ const GPRSMask& RegAlloc::GetGprs() const { return gprs; }
const FPRSMask& RegAlloc::GetFprs() const { return fprs; }

ir::HostGPR RegAlloc::GetTmpGPR() {

return ir::HostGPR{1};
}

Expand Down
5 changes: 5 additions & 0 deletions source/runtime/backend/riscv64/jit/jit_context.cpp
Original file line number Diff line number Diff line change
@@ -0,0 +1,5 @@
//
// Created by 甘尧 on 2023/12/13.
//

#include "jit_context.h"
8 changes: 8 additions & 0 deletions source/runtime/backend/riscv64/jit/jit_context.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,8 @@
//
// Created by 甘尧 on 2023/12/13.
//

#ifndef SWIFTVM_JIT_CONTEXT_H
#define SWIFTVM_JIT_CONTEXT_H

#endif // SWIFTVM_JIT_CONTEXT_H
2 changes: 1 addition & 1 deletion source/runtime/common/mem_arena.h
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ namespace swift::runtime {

class MemArena {
public:
explicit MemArena(size_t chunk_size = 4096) : new_chunk_size{chunk_size} {
explicit MemArena(size_t chunk_size = 4_KB) : new_chunk_size{chunk_size} {
node = &chunks.emplace_back(new_chunk_size);
}

Expand Down
4 changes: 4 additions & 0 deletions source/runtime/common/types.h
Original file line number Diff line number Diff line change
Expand Up @@ -6,6 +6,7 @@

#include <vector>
#include <list>
#include <set>
#include "base/types.h"
#include <boost/intrusive/slist.hpp>
#include <boost/intrusive/rbtree.hpp>
Expand Down Expand Up @@ -44,6 +45,9 @@ using Vector = typename std::vector<T>;
template <typename T>
using List = typename std::list<T>;

template <typename T>
using Set = typename std::set<T>;

template <typename T, size_t N>
using StackVector = typename boost::container::small_vector<T, N>;

Expand Down
5 changes: 4 additions & 1 deletion source/runtime/externals/riscv-asm/riscv64/CMakeLists.txt
Original file line number Diff line number Diff line change
@@ -1,3 +1,6 @@
add_library(riscv64_asm STATIC assembler_riscv64.cc
assembler_riscv64.h)
target_include_directories(riscv64_asm PUBLIC ${CMAKE_CURRENT_SOURCE_DIR})
target_include_directories(riscv64_asm PUBLIC ${CMAKE_CURRENT_SOURCE_DIR})

add_executable(riscv64_test main.cpp)
target_link_libraries(riscv64_test PRIVATE riscv64_asm)
10 changes: 5 additions & 5 deletions source/runtime/externals/riscv-asm/riscv64/assembler_riscv64.h
Original file line number Diff line number Diff line change
Expand Up @@ -921,7 +921,7 @@ class Assembler {
virtual void Bind(Label* label) = 0;
virtual void Jump(Label* label) = 0;

virtual ~Assembler() {}
virtual ~Assembler() = default;

/**
* @brief Buffer of DWARF's Call Frame Information opcodes.
Expand Down Expand Up @@ -1014,8 +1014,7 @@ class JumpTable {

class Riscv64Assembler final : public Assembler {
public:
explicit Riscv64Assembler(ArenaAllocator* allocator)
: Assembler(allocator)
explicit Riscv64Assembler(ArenaAllocator* allocator): Assembler(allocator)
, branches_{}
, finalized_(false)
, overwriting_(false)
Expand All @@ -1030,14 +1029,15 @@ class Riscv64Assembler final : public Assembler {
, available_scratch_fp_registers_(1u << FTMP) {
}

virtual ~Riscv64Assembler() {
~Riscv64Assembler() override {
for (auto& branch : branches_) {
CHECK(branch.IsResolved());
}
}



size_t CodeSize() const override { return Assembler::CodeSize(); }
DebugFrameOpCodeWriterForAssembler& cfi() { return Assembler::cfi(); }

// According to "The RISC-V Instruction Set Manual"

Expand Down
19 changes: 19 additions & 0 deletions source/runtime/externals/riscv-asm/riscv64/main.cpp
Original file line number Diff line number Diff line change
@@ -0,0 +1,19 @@
//
// Created by 甘尧 on 2023/12/8.
//

#include "assembler_riscv64.h"

int main (int argc, char * argv[]) {
using namespace swift;
riscv64::Riscv64Label label{};
riscv64::ArenaAllocator allocator{};
riscv64::Riscv64Assembler assembler{&allocator};
assembler.Add(riscv64::A1, riscv64::A1, riscv64::A1);
assembler.Bind(&label);
assembler.Add(riscv64::A1, riscv64::A1, riscv64::A1);
assembler.Add(riscv64::A1, riscv64::A1, riscv64::A1);
assembler.Bne(riscv64::A1, riscv64::A2, &label);
assembler.FinalizeCode();
return 0;
}
27 changes: 27 additions & 0 deletions source/runtime/ir/hir_builder.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,19 @@ namespace swift::runtime::ir {

Edge::Edge(HIRBlock* src, HIRBlock* dest) : src_block(src), dest_block(dest) {}

HIRLoop* HIRLoop::Create(HIRFunction* function, HIRBlock* header, size_t length) {
return function->pools.mem_arena.Create<HIRLoop>(function, header, length);
}

HIRLoop::HIRLoop(HIRFunction* function, HIRBlock* header, size_t length) {
loop = function->pools.CreateBlockVector(length);
std::memcpy(loop.data(), (void*)header, sizeof(HIRBlock*) * length);
}

HIRBlock* HIRLoop::GetHeader() const { return loop[0]; }

HIRBlockVector HIRLoop::GetLoopVector() const { return loop; }

HIRBlock::HIRBlock(Block* block, HIRValueMap& values, HIRPools& pools)
: block(block), value_map(values), pools(pools) {}

Expand Down Expand Up @@ -141,6 +154,8 @@ HIRBlockList& HIRFunction::GetHIRBlockList() { return block_list; }

HIRBlockList& HIRFunction::GetHIRBlocksRPO() { return blocks_rpo; }

HIRLoopList& HIRFunction::GetHIRLoop() { return loops; }

HIRValueMap& HIRFunction::GetHIRValues() { return values; }

HIRValue* HIRFunction::GetHIRValue(const Value& value) {
Expand Down Expand Up @@ -171,6 +186,8 @@ void HIRFunction::AddEdge(HIRBlock* src, HIRBlock* dest, bool conditional) {

void HIRFunction::RemoveEdge(Edge* edge) {}

void HIRFunction::AddLoop(HIRLoop* loop) { loops.push_back(*loop); }

void HIRFunction::MergeAdjacentBlocks(HIRBlock* left, HIRBlock* right) {}

bool HIRFunction::SplitBlock(HIRBlock* new_block, HIRBlock* old_block) { return false; }
Expand Down Expand Up @@ -361,4 +378,14 @@ Location HIRBuilder::GetNextLocation(const terminal::Terminal& term) {
});
}

void DfsHIRBlock(HIRBlock* start, HIRBlock* end, HIRBlockSet& visited) {
if (start == end || visited.count(start)) {
return;
}
visited.insert(start);
for (auto pred : start->GetPredecessors()) {
DfsHIRBlock(pred, end, visited);
}
}

} // namespace swift::runtime::ir
Loading

0 comments on commit 6d20d06

Please sign in to comment.