tweak code

ganyao114 · Dec 11, 2023 · 2463cd3 · 2463cd3
1 parent c8af311
commit 2463cd3
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Showing 8 changed files with 86 additions and 31 deletions.
diff --git a/CMakeLists.txt b/CMakeLists.txt
@@ -1,4 +1,5 @@
 cmake_minimum_required(VERSION 3.21)
+project(SwiftVM)
 
 # Platform-specific library requirements
 # ======================================

diff --git a/source/runtime/backend/reg_alloc.cpp b/source/runtime/backend/reg_alloc.cpp
@@ -10,18 +10,30 @@ RegAlloc::RegAlloc(u32 instr_size, const GPRSMask& gprs, const FPRSMask& fprs)
         : alloc_result{instr_size}, gprs(gprs), fprs(fprs) {}
 
 void RegAlloc::MapRegister(u32 id, ir::HostFPR fpr) {
-    alloc_result[id].type = FPR;
-    alloc_result[id].slot = fpr.id;
+    auto &map = alloc_result[id];
+    map.type = FPR;
+    map.slot = fpr.id;
 }
 
 void RegAlloc::MapRegister(u32 id, ir::HostGPR gpr) {
-    alloc_result[id].type = GPR;
-    alloc_result[id].slot = gpr.id;
+    auto &map = alloc_result[id];
+    map.type = GPR;
+    map.slot = gpr.id;
 }
 
-ir::HostFPR RegAlloc::ValueFPR(const ir::Value& value) { return {}; }
+void RegAlloc::SetActiveRegs(swift::u32 id, GPRSMask& gprs, FPRSMask& fprs) {
+    auto &map = alloc_result[id];
+    map.dirty_gprs = gprs;
+    map.dirty_fprs = fprs;
+}
 
-ir::HostGPR RegAlloc::ValueGPR(const ir::Value& value) { return {}; }
+ir::HostFPR RegAlloc::ValueFPR(const ir::Value& value) {
+    return ValueFPR(value.Id());
+}
+
+ir::HostGPR RegAlloc::ValueGPR(const ir::Value& value) {
+    return ValueGPR(value.Id());
+}
 
 ir::HostGPR RegAlloc::ValueGPR(u32 id) { return ir::HostGPR{alloc_result[id].slot}; }
 
@@ -31,4 +43,16 @@ const GPRSMask& RegAlloc::GetGprs() const { return gprs; }
 
 const FPRSMask& RegAlloc::GetFprs() const { return fprs; }
 
+ir::HostGPR RegAlloc::GetTmpGPR() {
+    return ir::HostGPR{1};
+}
+
+ir::HostFPR RegAlloc::GetTmpFPR() {
+    return ir::HostFPR{1};
+}
+
+void RegAlloc::SetCurrent(ir::Inst *inst) {
+    current_ir = inst;
+}
+
 }  // namespace swift::runtime::backend
diff --git a/source/runtime/backend/reg_alloc.h b/source/runtime/backend/reg_alloc.h
@@ -78,19 +78,27 @@ class RegAlloc : DeleteCopyAndMove {
         FPRSMask dirty_fprs{0};
     };
 
-    const GPRSMask& GetGprs() const;
-    const FPRSMask& GetFprs() const;
+    [[nodiscard]] const GPRSMask& GetGprs() const;
+    [[nodiscard]] const FPRSMask& GetFprs() const;
 
     void MapRegister(u32 id, ir::HostGPR gpr);
     void MapRegister(u32 id, ir::HostFPR fpr);
+    void SetActiveRegs(u32 id, GPRSMask &gprs, FPRSMask &fprs);
 
     ir::HostGPR ValueGPR(const ir::Value &value);
     ir::HostFPR ValueFPR(const ir::Value &value);
     ir::HostGPR ValueGPR(u32 id);
     ir::HostFPR ValueFPR(u32 id);
 
+    ir::HostGPR GetTmpGPR();
+    ir::HostFPR GetTmpFPR();
+
+    void SetCurrent(ir::Inst *inst);
+
 private:
     Vector<Map> alloc_result;
+    u32 stack_size{};
+    ir::Inst *current_ir{};
     const GPRSMask gprs;
     const FPRSMask fprs;
 };

diff --git a/source/runtime/ir/instr.cpp b/source/runtime/ir/instr.cpp
@@ -115,6 +115,25 @@ void Inst::UnUse(const Value& value) {
     }
 }
 
+Inst::Values Inst::GetValues() {
+    Values values{};
+    for (auto &arg : arguments) {
+        if (arg.IsValue()) {
+            values.push_back(arg.Get<Value>());
+        } else if (arg.IsLambda() && arg.Get<Lambda>().IsValue()) {
+            values.push_back(arg.Get<Lambda>().GetValue());
+        } else if (arg.IsParams()) {
+            auto& params = arg.Get<Params>();
+            for (auto param : params) {
+                if (auto data = param.data; data.IsValue()) {
+                    values.push_back(data.value);
+                }
+            }
+        }
+    }
+    return values;
+}
+
 OpCode Inst::GetOp() {
     return op_code;
 }
@@ -220,7 +239,7 @@ void Inst::Validate(Inst* inst) {
 }
 
 Inst::~Inst() {
-    for (int i = 0; i < max_args; ++i) {
+    for (u8 i = 0; i < max_args; ++i) {
         DestroyArg(i);
     }
 }

diff --git a/source/runtime/ir/instr.h b/source/runtime/ir/instr.h
@@ -26,6 +26,7 @@ concept InstAllocator = requires(T allocator, Inst* inst, OpCode code) {
 class Inst final : public SlabObject<Inst, true> {
 public:
     static constexpr auto max_args = 4;
+    using Values = StackVector<Value, max_args>;
 
     ~Inst();
 
@@ -91,6 +92,7 @@ class Inst final : public SlabObject<Inst, true> {
 
     void Use(const Value& value);
     void UnUse(const Value& value);
+    Values GetValues();
 
     OpCode GetOp();
     void SetId(u16 id);

diff --git a/source/runtime/ir/ir.inc b/source/runtime/ir/ir.inc
@@ -45,7 +45,7 @@ INST(GetCarry, BOOL, Value)
 INST(GetOverFlow, BOOL, Value)
 INST(GetZero, BOOL, Value)
 INST(GetNegate, BOOL, Value)
-INST(GetNegZero, Value, Value)
+INST(GetNegZero, BOOL, Value)
 INST(GetParity, BOOL, Value)
 INST(GetNZCV, Value, Value)
 INST(GetAllFlags, Value, Value)
@@ -66,4 +66,6 @@ INST(RorValue, Value, Value, Value)
 INST(BitExtract, Value, Value, Imm, Imm)
 INST(BitInsert, Value, Value, Value, Imm, Imm)
 INST(BitClear, Value, Value, Imm, Imm)
-INST(TestBit, BOOL, Value, Imm)
+INST(TestBit, BOOL, Value, Imm)
+INST(TestZero, BOOL, Value)
+INST(TestNotZero, BOOL, Value)
diff --git a/source/runtime/ir/opts/register_alloc_pass.cpp b/source/runtime/ir/opts/register_alloc_pass.cpp
@@ -23,22 +23,14 @@ struct LiveInterval {
 class LinearScanAllocator {
 public:
     explicit LinearScanAllocator(HIRFunction* function, backend::RegAlloc* alloc)
-            : function(function)
-            , block()
-            , reg_alloc(alloc)
-            , live_interval()
-            , active_lives() {
+            : function(function), block(), reg_alloc(alloc), live_interval(), active_lives() {
         active_gprs = alloc->GetGprs();
         active_fprs = alloc->GetFprs();
         live_interval.reserve(function->MaxInstrCount());
     }
 
     explicit LinearScanAllocator(Block* block, backend::RegAlloc* alloc)
-            : function()
-            , block(block)
-            , reg_alloc(alloc)
-            , live_interval()
-            , active_lives() {
+            : function(), block(block), reg_alloc(alloc), live_interval(), active_lives() {
         active_gprs = alloc->GetGprs();
         active_fprs = alloc->GetFprs();
         live_interval.reserve(block->GetInstList().size());
@@ -74,6 +66,7 @@ class LinearScanAllocator {
                     SpillAtInterval(interval);
                 }
             }
+            reg_alloc->SetActiveRegs(interval.inst->Id(), active_fprs, active_gprs);
         }
     }
 
@@ -84,18 +77,17 @@ class LinearScanAllocator {
             std::for_each(hir_value.uses.begin(), hir_value.uses.end(), [&end](auto& use) {
                 end = std::max(end, (u32)use.inst->Id());
             });
-            live_interval.push_back({
-                    hir_value.value.Def(), hir_value.GetOrderId(), end});
+            live_interval.push_back({hir_value.value.Def(), hir_value.GetOrderId(), end});
         }
     }
 
     void CollectLiveIntervals(Block* lir_block) {
         // TODO
         StackVector<u32, 32> use_end{};
         use_end.resize(lir_block->GetInstList().size());
-//        for (auto& instr : lir_block->GetInstList()) {
-//            live_interval.push_back({hir_value.value.Def(), hir_value.GetOrderId(), end});
-//        }
+        //        for (auto& instr : lir_block->GetInstList()) {
+        //            live_interval.push_back({hir_value.value.Def(), hir_value.GetOrderId(), end});
+        //        }
     }
 
     void ExpireOldIntervals(LiveInterval& current) {
@@ -113,10 +105,7 @@ class LinearScanAllocator {
         }
     }
 
-    void SpillAtInterval(LiveInterval& interval) {
-        auto is_float = IsFloatValue(interval.inst);
-
-    }
+    void SpillAtInterval(LiveInterval& interval) { auto is_float = IsFloatValue(interval.inst); }
 
     bool IsFloatValue(Inst* inst) {
         auto value_type = inst->ReturnType();

diff --git a/source/tests/main_case.cpp b/source/tests/main_case.cpp
@@ -108,7 +108,12 @@ TEST_CASE("Test runtime ir cfg") {
     Params params{};
     params.Push(local1);
     params.Push(local2);
-    hir_builder.CallDynamic(Lambda(Imm(uint64_t(1))), params);
+    auto call_inst = hir_builder.CallDynamic(Lambda(Imm(uint64_t(1))), params);
+    auto values = call_inst.Def()->GetValues();
+
+    for (auto va : values) {
+        ASSERT(va.Defined());
+    }
 
     hir_builder.Return();
     CFGAnalysisPass::Run(&hir_builder);
@@ -126,8 +131,13 @@ TEST_CASE("Test runtime ir cfg") {
 
 TEST_CASE("Test riscv64 asm") {
     using namespace swift;
+    riscv64::Riscv64Label label{};
     riscv64::ArenaAllocator allocator{};
     riscv64::Riscv64Assembler assembler{&allocator};
     assembler.Add(riscv64::A1, riscv64::A1, riscv64::A1);
+    assembler.Bind(&label);
+    assembler.Add(riscv64::A1, riscv64::A1, riscv64::A1);
+    assembler.Add(riscv64::A1, riscv64::A1, riscv64::A1);
+    assembler.Bne(riscv64::A1, riscv64::A2, &label);
     assembler.FinalizeCode();
 }