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feat: Asterisc contracts VM tests - Forge Test #22

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merged 22 commits into from
Mar 19, 2024
Merged

feat: Asterisc contracts VM tests - Forge Test #22

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260cff2
Fix step for `srliw`, `sraiw`
pcw109550 Mar 11, 2024
fa0e247
Stricter check for atomics
pcw109550 Mar 11, 2024
feedff1
Make comment to address RV64A is supported
pcw109550 Mar 11, 2024
b6215aa
Fix typo for CSRR
pcw109550 Mar 11, 2024
acc0f46
Add helper methods
pcw109550 Mar 11, 2024
a332fbe
Add R Type test: binary operator +,-,>>,<<,|,&,^
pcw109550 Mar 11, 2024
bea79c0
Add R Type test: binary operator *,/,%
pcw109550 Mar 11, 2024
c52b868
Add R Type test: atomics
pcw109550 Mar 11, 2024
f5a20e6
Add I Type test: binary operator +,-,>>,<<,|,&,^
pcw109550 Mar 11, 2024
0c50b1a
Add I Type test: jump,ecall,ebreak
pcw109550 Mar 11, 2024
a5247fb
Add I Type test: load
pcw109550 Mar 11, 2024
77c2e75
Add I Type test: csrr
pcw109550 Mar 11, 2024
a8e8e76
Add S Type test: store
pcw109550 Mar 11, 2024
eec478c
Add B Type test: branch
pcw109550 Mar 11, 2024
2739635
Add U Type test: lui,auipc
pcw109550 Mar 11, 2024
3847efc
Add J Type test: jal
pcw109550 Mar 11, 2024
695c339
Add I Type test: syscalls: preimage r/w
pcw109550 Mar 11, 2024
66116a4
Add gas snapshots
pcw109550 Mar 11, 2024
ca349af
Fix step for `srliw`, `sraiw`
pcw109550 Mar 14, 2024
83e43ac
Remove casting for signed binary operator /,%
pcw109550 Mar 19, 2024
4164212
Remove casting for unsigned binary operator /,%
pcw109550 Mar 19, 2024
1594779
Update gas snapshots
pcw109550 Mar 19, 2024
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6 changes: 3 additions & 3 deletions rvgo/fast/vm.go
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Original file line number Diff line number Diff line change
Expand Up @@ -656,10 +656,10 @@ func (inst *InstrumentedState) riscvStep() (outErr error) {
rdValue = mask32Signed64(shl64(and64(imm, toU64(0x1F)), rs1Value))
case 5: // 101 = SR~
shamt := and64(imm, toU64(0x1F))
switch shr64(toU64(6), imm) { // in rv64i the top 6 bits select the shift type
case 0x00: // 000000 = SRLIW
switch shr64(toU64(5), imm) { // top 7 bits select the shift type
case 0x00: // 0000000 = SRLIW
rdValue = signExtend64(shr64(shamt, and64(rs1Value, u32Mask())), toU64(31))
case 0x10: // 010000 = SRAIW
case 0x20: // 0100000 = SRAIW
rdValue = signExtend64(shr64(shamt, and64(rs1Value, u32Mask())), sub64(toU64(31), shamt))
}
}
Expand Down
6 changes: 3 additions & 3 deletions rvgo/slow/vm.go
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -836,10 +836,10 @@ func Step(calldata []byte, po PreimageOracle) (stateHash common.Hash, outErr err
rdValue = mask32Signed64(shl64(and64(imm, toU64(0x1F)), rs1Value))
case 5: // 101 = SR~
shamt := and64(imm, toU64(0x1F))
switch shr64(toU64(6), imm).val() { // in rv64i the top 6 bits select the shift type
case 0x00: // 000000 = SRLIW
switch shr64(toU64(5), imm).val() { // top 7 bits select the shift type
case 0x00: // 0000000 = SRLIW
rdValue = signExtend64(shr64(shamt, and64(rs1Value, u32Mask())), toU64(31))
case 0x10: // 010000 = SRAIW
case 0x20: // 0100000 = SRAIW
rdValue = signExtend64(shr64(shamt, and64(rs1Value, u32Mask())), sub64(toU64(31), shamt))
}
}
Expand Down
95 changes: 95 additions & 0 deletions rvsol/.gas-snapshot
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Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,95 @@
RISCV_Test:test_add_succeeds() (gas: 175505)
RISCV_Test:test_addi_succeeds() (gas: 174720)
RISCV_Test:test_addiw_succeeds() (gas: 174987)
RISCV_Test:test_addw_succeeds() (gas: 175884)
RISCV_Test:test_amoaddd_succeeds() (gas: 382706)
RISCV_Test:test_amoaddw_succeeds() (gas: 369214)
RISCV_Test:test_amoandd_succeeds() (gas: 382221)
RISCV_Test:test_amoandw_succeeds() (gas: 368804)
RISCV_Test:test_amomaxd_succeeds() (gas: 364731)
RISCV_Test:test_amomaxud_succeeds() (gas: 364541)
RISCV_Test:test_amomaxuw_succeeds() (gas: 350877)
RISCV_Test:test_amomaxw_succeeds() (gas: 351148)
RISCV_Test:test_amomind_succeeds() (gas: 364548)
RISCV_Test:test_amominud_succeeds() (gas: 364454)
RISCV_Test:test_amominuw_succeeds() (gas: 350518)
RISCV_Test:test_amominw_succeeds() (gas: 351001)
RISCV_Test:test_amoord_succeeds() (gas: 382509)
RISCV_Test:test_amoorw_succeeds() (gas: 368930)
RISCV_Test:test_amoswapd_succeeds() (gas: 364122)
RISCV_Test:test_amoswapw_succeeds() (gas: 350330)
RISCV_Test:test_amoxord_succeeds() (gas: 382480)
RISCV_Test:test_amoxorw_succeeds() (gas: 368834)
RISCV_Test:test_and_succeeds() (gas: 175411)
RISCV_Test:test_andi_succeeds() (gas: 174708)
RISCV_Test:test_auipc_succeeds() (gas: 174390)
RISCV_Test:test_beq_succeeds() (gas: 176047)
RISCV_Test:test_bge_succeeds() (gas: 176534)
RISCV_Test:test_bgeu_succeeds() (gas: 176320)
RISCV_Test:test_blt_succeeds() (gas: 176262)
RISCV_Test:test_bltu_succeeds() (gas: 176180)
RISCV_Test:test_bne_succeeds() (gas: 176231)
RISCV_Test:test_csrrc_succeeds() (gas: 175051)
RISCV_Test:test_csrrci_succeeds() (gas: 174245)
RISCV_Test:test_csrrs_succeeds() (gas: 174929)
RISCV_Test:test_csrrsi_succeeds() (gas: 174174)
RISCV_Test:test_csrrw_succeeds() (gas: 174815)
RISCV_Test:test_csrrwi_succeeds() (gas: 174033)
RISCV_Test:test_div_succeeds() (gas: 175828)
RISCV_Test:test_divu_succeeds() (gas: 175560)
RISCV_Test:test_divuw_succeeds() (gas: 176054)
RISCV_Test:test_divw_succeeds() (gas: 176831)
RISCV_Test:test_ebreak_succeeds() (gas: 172772)
RISCV_Test:test_ecall_succeeds() (gas: 175739)
RISCV_Test:test_jal_succeeds() (gas: 175200)
RISCV_Test:test_jalr_succeeds() (gas: 175297)
RISCV_Test:test_lb_succeeds() (gas: 206810)
RISCV_Test:test_lbu_succeeds() (gas: 206019)
RISCV_Test:test_ld_succeeds() (gas: 217344)
RISCV_Test:test_lh_succeeds() (gas: 208942)
RISCV_Test:test_lhu_succeeds() (gas: 208063)
RISCV_Test:test_lrd_succeeds() (gas: 217802)
RISCV_Test:test_lrw_succeeds() (gas: 212114)
RISCV_Test:test_lui_succeeds() (gas: 173754)
RISCV_Test:test_lw_succeeds() (gas: 211910)
RISCV_Test:test_lwu_succeeds() (gas: 211074)
RISCV_Test:test_mul_succeeds() (gas: 175633)
RISCV_Test:test_mulh_succeeds() (gas: 175947)
RISCV_Test:test_mulhsu_succeeds() (gas: 175811)
RISCV_Test:test_mulhu_succeeds() (gas: 175464)
RISCV_Test:test_mulw_succeeds() (gas: 176107)
RISCV_Test:test_or_succeeds() (gas: 175463)
RISCV_Test:test_ori_succeeds() (gas: 174682)
RISCV_Test:test_preimage_read_succeeds() (gas: 357373)
RISCV_Test:test_preimage_write_succeeds() (gas: 207573)
RISCV_Test:test_rem_succeeds() (gas: 175850)
RISCV_Test:test_remu_succeeds() (gas: 175523)
RISCV_Test:test_remuw_succeeds() (gas: 175998)
RISCV_Test:test_remw_succeeds() (gas: 176811)
RISCV_Test:test_sb_succeeds() (gas: 309299)
RISCV_Test:test_scd_succeeds() (gas: 320930)
RISCV_Test:test_scw_succeeds() (gas: 315067)
RISCV_Test:test_sd_succeeds() (gas: 319248)
RISCV_Test:test_sh_succeeds() (gas: 310754)
RISCV_Test:test_sll_succeeds() (gas: 175474)
RISCV_Test:test_slli_succeeds() (gas: 174740)
RISCV_Test:test_slliw_succeeds() (gas: 174975)
RISCV_Test:test_sllw_succeeds() (gas: 175730)
RISCV_Test:test_slt_succeeds() (gas: 175683)
RISCV_Test:test_slti_succeeds() (gas: 174974)
RISCV_Test:test_sltiu_succeeds() (gas: 174735)
RISCV_Test:test_sltu_succeeds() (gas: 175443)
RISCV_Test:test_sra_succeeds() (gas: 176145)
RISCV_Test:test_srai_succeeds() (gas: 175413)
RISCV_Test:test_sraiw_succeeds() (gas: 175546)
RISCV_Test:test_sraw_succeeds() (gas: 176306)
RISCV_Test:test_srl_succeeds() (gas: 175561)
RISCV_Test:test_srli_succeeds() (gas: 174856)
RISCV_Test:test_srliw_succeeds() (gas: 175047)
RISCV_Test:test_srlw_succeeds() (gas: 175709)
RISCV_Test:test_step_abi_succeeds() (gas: 92452)
RISCV_Test:test_sub_succeeds() (gas: 175553)
RISCV_Test:test_subw_succeeds() (gas: 175894)
RISCV_Test:test_sw_succeeds() (gas: 313600)
RISCV_Test:test_xor_succeeds() (gas: 175384)
RISCV_Test:test_xori_succeeds() (gas: 174717)
16 changes: 8 additions & 8 deletions rvsol/src/RISCV.sol
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -510,7 +510,7 @@ contract RISCV {
out := shr64(toU64(25), instr)
}

function parseCSSR(instr) -> out {
function parseCSRR(instr) -> out {
out := shr64(toU64(20), instr)
}

Expand Down Expand Up @@ -721,7 +721,7 @@ contract RISCV {
} case 3 { // ?11 = CSRRC(I)
v := and64(out, not64(v))
} default {
revertWithCode(0xbadc0de0) // unkwown CSR mode
revertWithCode(0xbadc0de0) // unknown CSR mode
}
writeCSR(num, v)
}
Expand Down Expand Up @@ -1123,10 +1123,10 @@ contract RISCV {
rdValue := mask32Signed64(shl64(and64(imm, toU64(0x1F)), rs1Value))
} case 5 { // 101 = SR~
let shamt := and64(imm, toU64(0x1F))
switch shr64(toU64(6), imm) // in rv64i the top 6 bits select the shift type
case 0x00 { // 000000 = SRLIW
switch shr64(toU64(5), imm) // top 7 bits select the shift type
case 0x00 { // 0000000 = SRLIW
rdValue := signExtend64(shr64(shamt, and64(rs1Value, u32Mask())), toU64(31))
} case 0x10 { // 010000 = SRAIW
} case 0x20 { // 0100000 = SRAIW
rdValue := signExtend64(shr64(shamt, and64(rs1Value, u32Mask())), sub64(toU64(31), shamt))
}
}
Expand Down Expand Up @@ -1301,7 +1301,7 @@ contract RISCV {
setPC(add64(_pc, toU64(4))) // ignore breakpoint
}
} default { // CSR instructions
let imm := parseCSSR(instr)
let imm := parseCSRR(instr)
let value := rs1
if iszero64(and64(funct3, toU64(4))) {
value := getRegister(rs1)
Expand All @@ -1311,7 +1311,7 @@ contract RISCV {
setRegister(rd, rdValue)
setPC(add64(_pc, toU64(4)))
}
} case 0x2F { // 010_1111: RV32A and RV32A atomic operations extension
} case 0x2F { // 010_1111: RV{32,64}A and RV{32,64}A atomic operations extension
// acquire and release bits:
// aq := and64(shr64(toU64(1), funct7), toU64(1))
// rl := and64(funct7, toU64(1))
Expand All @@ -1324,7 +1324,7 @@ contract RISCV {
// 0b010 == RV32A W variants
// 0b011 == RV64A D variants
let size := shl64(funct3, toU64(1))
if lt64(size, toU64(4)) {
if or(lt64(size, toU64(4)), gt64(size, toU64(8))) {
revertWithCode(0xbada70) // bad AMO size
}
let addr := getRegister(rs1)
Expand Down
95 changes: 95 additions & 0 deletions rvsol/test/.gas-snapshot
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,95 @@
RISCV_Test:test_add_succeeds() (gas: 175505)
RISCV_Test:test_addi_succeeds() (gas: 174720)
RISCV_Test:test_addiw_succeeds() (gas: 174987)
RISCV_Test:test_addw_succeeds() (gas: 175884)
RISCV_Test:test_amoaddd_succeeds() (gas: 382706)
RISCV_Test:test_amoaddw_succeeds() (gas: 369214)
RISCV_Test:test_amoandd_succeeds() (gas: 382221)
RISCV_Test:test_amoandw_succeeds() (gas: 368804)
RISCV_Test:test_amomaxd_succeeds() (gas: 364731)
RISCV_Test:test_amomaxud_succeeds() (gas: 364541)
RISCV_Test:test_amomaxuw_succeeds() (gas: 350877)
RISCV_Test:test_amomaxw_succeeds() (gas: 351148)
RISCV_Test:test_amomind_succeeds() (gas: 364548)
RISCV_Test:test_amominud_succeeds() (gas: 364454)
RISCV_Test:test_amominuw_succeeds() (gas: 350518)
RISCV_Test:test_amominw_succeeds() (gas: 351001)
RISCV_Test:test_amoord_succeeds() (gas: 382509)
RISCV_Test:test_amoorw_succeeds() (gas: 368930)
RISCV_Test:test_amoswapd_succeeds() (gas: 364122)
RISCV_Test:test_amoswapw_succeeds() (gas: 350330)
RISCV_Test:test_amoxord_succeeds() (gas: 382480)
RISCV_Test:test_amoxorw_succeeds() (gas: 368834)
RISCV_Test:test_and_succeeds() (gas: 175411)
RISCV_Test:test_andi_succeeds() (gas: 174708)
RISCV_Test:test_auipc_succeeds() (gas: 174390)
RISCV_Test:test_beq_succeeds() (gas: 176047)
RISCV_Test:test_bge_succeeds() (gas: 176534)
RISCV_Test:test_bgeu_succeeds() (gas: 176320)
RISCV_Test:test_blt_succeeds() (gas: 176262)
RISCV_Test:test_bltu_succeeds() (gas: 176180)
RISCV_Test:test_bne_succeeds() (gas: 176231)
RISCV_Test:test_csrrc_succeeds() (gas: 175051)
RISCV_Test:test_csrrci_succeeds() (gas: 174245)
RISCV_Test:test_csrrs_succeeds() (gas: 174929)
RISCV_Test:test_csrrsi_succeeds() (gas: 174174)
RISCV_Test:test_csrrw_succeeds() (gas: 174815)
RISCV_Test:test_csrrwi_succeeds() (gas: 174033)
RISCV_Test:test_div_succeeds() (gas: 175828)
RISCV_Test:test_divu_succeeds() (gas: 175560)
RISCV_Test:test_divuw_succeeds() (gas: 176054)
RISCV_Test:test_divw_succeeds() (gas: 176831)
RISCV_Test:test_ebreak_succeeds() (gas: 172772)
RISCV_Test:test_ecall_succeeds() (gas: 175739)
RISCV_Test:test_jal_succeeds() (gas: 175200)
RISCV_Test:test_jalr_succeeds() (gas: 175297)
RISCV_Test:test_lb_succeeds() (gas: 206810)
RISCV_Test:test_lbu_succeeds() (gas: 206019)
RISCV_Test:test_ld_succeeds() (gas: 217344)
RISCV_Test:test_lh_succeeds() (gas: 208942)
RISCV_Test:test_lhu_succeeds() (gas: 208063)
RISCV_Test:test_lrd_succeeds() (gas: 217802)
RISCV_Test:test_lrw_succeeds() (gas: 212114)
RISCV_Test:test_lui_succeeds() (gas: 173754)
RISCV_Test:test_lw_succeeds() (gas: 211910)
RISCV_Test:test_lwu_succeeds() (gas: 211074)
RISCV_Test:test_mul_succeeds() (gas: 175633)
RISCV_Test:test_mulh_succeeds() (gas: 175947)
RISCV_Test:test_mulhsu_succeeds() (gas: 175811)
RISCV_Test:test_mulhu_succeeds() (gas: 175464)
RISCV_Test:test_mulw_succeeds() (gas: 176107)
RISCV_Test:test_or_succeeds() (gas: 175463)
RISCV_Test:test_ori_succeeds() (gas: 174682)
RISCV_Test:test_preimage_read_succeeds() (gas: 357373)
RISCV_Test:test_preimage_write_succeeds() (gas: 207573)
RISCV_Test:test_rem_succeeds() (gas: 175850)
RISCV_Test:test_remu_succeeds() (gas: 175523)
RISCV_Test:test_remuw_succeeds() (gas: 175998)
RISCV_Test:test_remw_succeeds() (gas: 176811)
RISCV_Test:test_sb_succeeds() (gas: 309299)
RISCV_Test:test_scd_succeeds() (gas: 320930)
RISCV_Test:test_scw_succeeds() (gas: 315067)
RISCV_Test:test_sd_succeeds() (gas: 319248)
RISCV_Test:test_sh_succeeds() (gas: 310754)
RISCV_Test:test_sll_succeeds() (gas: 175474)
RISCV_Test:test_slli_succeeds() (gas: 174740)
RISCV_Test:test_slliw_succeeds() (gas: 174975)
RISCV_Test:test_sllw_succeeds() (gas: 175730)
RISCV_Test:test_slt_succeeds() (gas: 175683)
RISCV_Test:test_slti_succeeds() (gas: 174974)
RISCV_Test:test_sltiu_succeeds() (gas: 174735)
RISCV_Test:test_sltu_succeeds() (gas: 175443)
RISCV_Test:test_sra_succeeds() (gas: 176145)
RISCV_Test:test_srai_succeeds() (gas: 175413)
RISCV_Test:test_sraiw_succeeds() (gas: 175546)
RISCV_Test:test_sraw_succeeds() (gas: 176306)
RISCV_Test:test_srl_succeeds() (gas: 175561)
RISCV_Test:test_srli_succeeds() (gas: 174856)
RISCV_Test:test_srliw_succeeds() (gas: 175047)
RISCV_Test:test_srlw_succeeds() (gas: 175709)
RISCV_Test:test_step_abi_succeeds() (gas: 92452)
RISCV_Test:test_sub_succeeds() (gas: 175553)
RISCV_Test:test_subw_succeeds() (gas: 175894)
RISCV_Test:test_sw_succeeds() (gas: 313600)
RISCV_Test:test_xor_succeeds() (gas: 175384)
RISCV_Test:test_xori_succeeds() (gas: 174717)
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