Compact function

esp-rs · Nov 25, 2023 · 111b48b · 111b48b
1 parent ba1fe99
commit 111b48b
Showing 1 changed file with 17 additions and 38 deletions.
diff --git a/esp-hal-common/src/rtc_cntl/sleep/esp32c6.rs b/esp-hal-common/src/rtc_cntl/sleep/esp32c6.rs
@@ -1376,46 +1376,25 @@ fn modem_clock_hal_deselect_all_wifi_lpclk_source() {
 
 fn modem_clock_hal_select_wifi_lpclk_source(src: ModemClockLpclkSource) {
     unsafe {
-        match src {
-            ModemClockLpclkSource::RcSlow => modem_lpcon()
-                .coex_lp_clk_conf
-                .modify(|_, w| w.clk_coex_lp_sel_osc_slow().set_bit()),
-
-            ModemClockLpclkSource::RcFast => modem_lpcon()
-                .coex_lp_clk_conf
-                .modify(|_, w| w.clk_coex_lp_sel_osc_fast().set_bit()),
-
-            ModemClockLpclkSource::MainXtal => modem_lpcon()
-                .coex_lp_clk_conf
-                .modify(|_, w| w.clk_coex_lp_sel_xtal().set_bit()),
-
-            ModemClockLpclkSource::RC32K => {
-                modem_lpcon()
-                    .coex_lp_clk_conf
-                    .modify(|_, w| w.clk_coex_lp_sel_xtal32k().set_bit());
-                modem_lpcon()
-                    .modem_32k_clk_conf
-                    .modify(|_, w| w.clk_modem_32k_sel().variant(1));
-            }
+        modem_lpcon().coex_lp_clk_conf.modify(|_, w| match src {
+            ModemClockLpclkSource::RcSlow => w.clk_coex_lp_sel_osc_slow().set_bit(),
+            ModemClockLpclkSource::RcFast => w.clk_coex_lp_sel_osc_fast().set_bit(),
+            ModemClockLpclkSource::MainXtal => w.clk_coex_lp_sel_xtal().set_bit(),
+
+            ModemClockLpclkSource::RC32K
+            | ModemClockLpclkSource::XTAL32K
+            | ModemClockLpclkSource::EXT32K => w.clk_coex_lp_sel_xtal32k().set_bit(),
+        });
 
-            ModemClockLpclkSource::XTAL32K => {
-                modem_lpcon()
-                    .coex_lp_clk_conf
-                    .modify(|_, w| w.clk_coex_lp_sel_xtal32k().set_bit());
-                modem_lpcon()
-                    .modem_32k_clk_conf
-                    .modify(|_, w| w.clk_modem_32k_sel().variant(0));
-            }
+        modem_lpcon().modem_32k_clk_conf.modify(|_, w| match src {
+            ModemClockLpclkSource::RcSlow
+            | ModemClockLpclkSource::RcFast
+            | ModemClockLpclkSource::MainXtal => {}
 
-            ModemClockLpclkSource::EXT32K => {
-                modem_lpcon()
-                    .coex_lp_clk_conf
-                    .modify(|_, w| w.clk_coex_lp_sel_xtal32k().set_bit());
-                modem_lpcon()
-                    .modem_32k_clk_conf
-                    .modify(|_, w| w.clk_modem_32k_sel().variant(2));
-            }
-        }
+            ModemClockLpclkSource::RC32K => w.clk_modem_32k_sel().variant(1),
+            ModemClockLpclkSource::XTAL32K => w.clk_modem_32k_sel().variant(0),
+            ModemClockLpclkSource::EXT32K => w.clk_modem_32k_sel().variant(2),
+        });
     }
 }