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enhance FFTW easyblock to support SVE CPU feature and building with Fujitsu compiler #2425

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May 26, 2021
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24 changes: 19 additions & 5 deletions easybuild/easyblocks/f/fftw.py
Original file line number Diff line number Diff line change
Expand Up @@ -33,6 +33,7 @@
from easybuild.easyblocks.generic.configuremake import ConfigureMake
from easybuild.framework.easyconfig import CUSTOM
from easybuild.toolchains.compiler.gcc import TC_CONSTANT_GCC
from easybuild.toolchains.compiler.fujitsu import TC_CONSTANT_FUJITSU
from easybuild.tools.build_log import EasyBuildError
from easybuild.tools.config import build_option
from easybuild.tools.modules import get_software_version
Expand All @@ -46,7 +47,7 @@
FFTW_CPU_FEATURE_FLAGS_SINGLE_DOUBLE = ['avx', 'avx2', 'avx512', 'fma4', 'sse2', 'vsx']
# Altivec (POWER), SSE (x86), NEON (ARM), FMA (x86_64)
# asimd is CPU feature for extended NEON on AARCH64
FFTW_CPU_FEATURE_FLAGS = FFTW_CPU_FEATURE_FLAGS_SINGLE_DOUBLE + ['altivec', 'asimd', 'neon', 'sse']
FFTW_CPU_FEATURE_FLAGS = FFTW_CPU_FEATURE_FLAGS_SINGLE_DOUBLE + ['altivec', 'asimd', 'neon', 'sse', 'sve']
FFTW_PRECISION_FLAGS = ['single', 'double', 'long-double', 'quad-precision']


Expand Down Expand Up @@ -187,9 +188,14 @@ def run_all_steps(self, *args, **kwargs):
if prec == 'single' and getattr(self, flag):
prec_configopts.append('--enable-%s' % flag)

# NEON (ARM) only for single precision and double precision (on AARCH64)
if (prec == 'single' and (self.asimd or self.neon)) or (prec == 'double' and self.asimd):
prec_configopts.append('--enable-neon')
if self.sve:
# SVE (ARM) only for single precision and double precision (on AARCH64 if sve feature is present)
if prec == 'single' or prec == 'double':
prec_configopts.append('--enable-fma --enable-sve --enable-armv8-cntvct-el0')
elif self.asimd or self.neon:
# NEON (ARM) only for single precision and double precision (on AARCH64)
if prec == 'single' or (prec == 'double' and self.asimd):
prec_configopts.append('--enable-neon')

# For POWER with GCC 5/6/7 and FFTW/3.3.6 we need to disable some settings for tests to pass
# (we do it last so as not to affect previous logic)
Expand All @@ -207,6 +213,14 @@ def run_all_steps(self, *args, **kwargs):
self.log.info("Disabling vsx for double precision on POWER with GCC for FFTW/%s" % self.version)
prec_configopts.append('--disable-vsx')

# Fujitsu specific flags (from build instructions at https://github.com/fujitsu/fftw3)
if self.toolchain.comp_family() == TC_CONSTANT_FUJITSU:
prec_configopts.append('CFLAGS="-Ofast"')
prec_configopts.append('FFLAGS="-Kfast"')
prec_configopts.append('ac_cv_prog_f77_v="-###"')
if self.cfg['with_openmp']:
prec_configopts.append('OPENMP_CFLAGS="-Kopenmp"')

# append additional configure options (may be empty string, but that's OK)
self.cfg.update('configopts', [' '.join(prec_configopts) + ' ' + common_config_opts])

Expand All @@ -217,7 +231,7 @@ def run_all_steps(self, *args, **kwargs):
def test_step(self):
"""Custom implementation of test step for FFTW."""

if self.toolchain.mpi_family() == toolchain.OPENMPI:
if self.toolchain.mpi_family() == toolchain.OPENMPI and not self.toolchain.comp_family() == TC_CONSTANT_FUJITSU:

# allow oversubscription of number of processes over number of available cores with OpenMPI 3.0 & newer,
# to avoid that some tests fail if only a handful of cores are available
Expand Down