docs/conf: add ExtLinks

Signed-off-by: Unai Martinez-Corral <[email protected]>
chipsalliance · Mar 9, 2022 · f0b91db · f0b91db
1 parent 4983a34
commit f0b91db
Showing 1 changed file with 16 additions and 4 deletions.
diff --git a/docs/conf.py b/docs/conf.py
@@ -8,7 +8,7 @@
 
 #sys.path.insert(0, os.path.abspath('.'))
 
-# -- General configuration -----------------------------------------------------
+# -- General configuration ---------------------------------------------------------------------------------------------
 
 project = 'F4PGA'
 basic_filename = 'f4pga-docs'
@@ -19,6 +19,7 @@
 release = '' # The full version, including alpha/beta/rc tags.
 
 extensions = [
+    'sphinx.ext.extlinks',
     'sphinx.ext.intersphinx',
     'sphinx_verilog_domain',
     'sphinxcontrib.images',
@@ -52,7 +53,7 @@
    :format: html
 """
 
-# -- Options for HTML output ---------------------------------------------------
+# -- Options for HTML output -------------------------------------------------------------------------------------------
 
 html_show_sourcelink = True
 
@@ -71,7 +72,7 @@
 html_logo = str(Path(html_static_path[0]) / 'logo.svg')
 html_favicon = str(Path(html_static_path[0]) / 'favicon.svg')
 
-# -- Options for LaTeX output --------------------------------------------------
+# -- Options for LaTeX output ------------------------------------------------------------------------------------------
 
 latex_documents = [
   ('index', basic_filename+'.tex', project,
@@ -104,7 +105,7 @@
     '''
 }
 
-# -- Options for manual page output --------------------------------------------
+# -- Options for manual page output ------------------------------------------------------------------------------------
 
 man_pages = [
     ('index', basic_filename, project,
@@ -121,3 +122,14 @@
     "prjxray": ("https://f4pga.readthedocs.io/projects/prjxray/en/latest/", None),
     "vtr": ("https://docs.verilogtorouting.org/en/latest/", None),
 }
+
+# -- Sphinx.Ext.ExtLinks -----------------------------------------------------------------------------------------------
+
+extlinks = {
+   'wikipedia': ('https://en.wikipedia.org/wiki/%s', 'wikipedia:'),
+   'gh':        ('https://github.com/%s', 'gh:'),
+   'ghsharp':   ('https://github.com/chipsalliance/f4pga/issues/%s', '#'),
+   'ghissue':   ('https://github.com/chipsalliance/f4pga/issues/%s', 'issue #'),
+   'ghpull':    ('https://github.com/chipsalliance/f4pga/pull/%s', 'pull request #'),
+   'ghsrc':     ('https://github.com/chipsalliance/f4pga/blob/master/%s', '')
+}