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Fix broken mdoc #1600

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merged 5 commits into from
Sep 24, 2020
Merged

Fix broken mdoc #1600

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5fb9aa7
Fix broken mdoc
azidar Sep 23, 2020
313ed06
Added test-chisel-docs to ci workflow
azidar Sep 23, 2020
5f75be5
Add requirement on build-treadle job
azidar Sep 23, 2020
f6b72ab
Added forgotton colon
azidar Sep 23, 2020
b65fc6b
Forgot cd into chisel3 dir
azidar Sep 24, 2020
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6 changes: 5 additions & 1 deletion .circleci/config.yml
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Original file line number Diff line number Diff line change
Expand Up @@ -141,13 +141,14 @@ jobs:

test-chisel-docs:
executor: chisel-executor

steps:
- attach_workspace:
at: /home/chisel

- run:
command: |
sbt $SBT_ARGS "docs/mdoc"
(cd chisel3 && cat /dev/null | sbt $SBT_ARGS "docs/mdoc")

test-chisel-2_11:
executor: chisel-executor
Expand Down Expand Up @@ -178,4 +179,7 @@ workflows:
- test-chisel-2_12:
requires:
- build-treadle
- test-chisel-docs:
requires:
- build-treadle

2 changes: 1 addition & 1 deletion docs/src/cookbooks/naming.md
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Expand Up @@ -58,5 +58,5 @@ class ExampleNoPrefix extends MultiIOModule {
out := add
}

println(ChiselStage.emitVerilog(new Example7))
println(ChiselStage.emitVerilog(new ExampleNoPrefix))
```
2 changes: 1 addition & 1 deletion docs/src/explanations/naming.md
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Expand Up @@ -213,7 +213,7 @@ reflection naming cannot:
```scala mdoc
class Example10 extends MultiIOModule {
{
val in = IO(Input(UInt(width.W)))
val in = IO(Input(UInt(3.W)))
val out = IO(Output(UInt()))

val add = in + in
Expand Down