Strip Object and Outer Class from desiredName

[seldridge]

This implements the fix proposed in #1166.

In effect, this strips package names, object names, and outer classes from inner classes when computing the desiredName. This mirrors the behavior of what I think desiredName is supposed to be, i.e., behaving like getSimpleName.

An effect of this is that naming behaves much better in the REPL.

Related issue: Fixes #1166

Type of change: other enhancement

Impact: API modification

Development Phase: implementation

[chick]

This looks good to me and it makes sense.
Only question is: Does this count as an API change?

[seldridge]

It's an API change only if we count changes to generated FIRRTL (in any form) as an API change. I think that could go either way.

[jackkoenig]

I would definitely count changed Verilog module names as API changes since that's a pretty important API

[seldridge]

I agree with you about the API change, but I'd argue that counting on Verilog names is wrong due to problems with composition (the name can change depending on the namespace even with desiredName overridden).

We probably need some way of failing to elaborate if a desired name isn't successfully set as I don't think there's a mechanism to guarantee a name.

[seldridge]

@jackkoenig: What's the merge policy for this? Would this need to run through additional regressions given the fact that it's changing Verilog name generation?

Also, @jackkoenig: this should enable us to use custom mdoc tags on the website to generate FIRRTL and Verilog without resulting in terrible readiwiwiwiwiwFoo module names.

[azidar]

LGTM. Can override if needed...?