Fix .toString for dynamic indexing (backport #4260) (#4266)

* Fix .toString for dynamic indexing (#4260) (cherry picked from commit 95b7fcc) # Conflicts: # core/src/main/scala/chisel3/internal/firrtl/IR.scala * Resolve backport conflicts --------- Co-authored-by: Jack Koenig <[email protected]>
chipsalliance · Jul 10, 2024 · c94c9e1 · c94c9e1
1 parent bad5ac1
commit c94c9e1
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diff --git a/core/src/main/scala/chisel3/internal/firrtl/IR.scala b/core/src/main/scala/chisel3/internal/firrtl/IR.scala
@@ -91,7 +91,7 @@ case class Node(id: HasId) extends Arg {
 @deprecated(deprecatedPublicAPIMsg, "Chisel 3.6")
 object Arg {
   def earlyLocalName(id: HasId): String = id.getOptionRef match {
-    case Some(Index(Node(imm), Node(value))) => s"${earlyLocalName(imm)}[${earlyLocalName(imm)}]"
+    case Some(Index(Node(imm), Node(value))) => s"${earlyLocalName(imm)}[${earlyLocalName(value)}]"
     case Some(Index(Node(imm), arg))         => s"${earlyLocalName(imm)}[${arg.localName}]"
     case Some(Slot(Node(imm), name))         => s"${earlyLocalName(imm)}.$name"
     case Some(OpaqueSlot(Node(imm)))         => s"${earlyLocalName(imm)}"

diff --git a/src/test/scala/chiselTests/DataPrint.scala b/src/test/scala/chiselTests/DataPrint.scala
@@ -53,6 +53,16 @@ class DataPrintSpec extends ChiselFlatSpec with Matchers {
     (2.U + 2.U).toString should be("BoundDataModule.?: OpResult[UInt<2>]")
     Wire(Vec(3, UInt(2.W))).toString should be("BoundDataModule.?: Wire[UInt<2>[3]]")
 
+    val idx = IO(Input(UInt(3.W)))
+    val jdx = IO(Input(new Bundle {
+      val value = UInt(3.W)
+    }))
+    val port = IO(Input(new Bundle {
+      val vec = Vec(8, UInt(8.W))
+    }))
+    port.vec(idx).toString should be("BoundDataModule.port.vec[idx]: IO[UInt<8>]")
+    port.vec(jdx.value).toString should be("BoundDataModule.port.vec[jdx.value]: IO[UInt<8>]")
+
     class InnerModule extends Module {
       val io = IO(Output(new Bundle {
         val a = UInt(4.W)