Fix width of ChiselEnum values in emitted FIRRTL · chipsalliance/chisel@5489b86

Triggered via pull request June 28, 2024 23:42

jackkoenig

synchronize #4200

fix-enum-width

Status Success

Total duration 16m 1s

Artifacts 2

ci.yml

on: pull_request

Matrix: ci

Produced during runtime

Name	Size
chisel-example.scala Expired	709 Bytes
website Expired	8.88 MB