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Winch: Add SIMD conversion operators for x64 with AVX #10180

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Feb 6, 2025
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Winch: Add SIMD conversion operators for x64 with AVX #10180

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64bb05e
Winch: Add SIMD conversion operators for x64 with AVX
jeffcharles Feb 4, 2025
ed1801c
Merge branch 'main' into winch-simd-conversions
jeffcharles Feb 5, 2025
b0c1a53
Update method name after merge
jeffcharles Feb 5, 2025
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10 changes: 5 additions & 5 deletions crates/wast-util/src/lib.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -420,15 +420,11 @@ impl WastTest {
// simd-related failures
"annotations/simd_lane.wast",
"memory64/simd.wast",
"misc_testsuite/int-to-float-splat.wast",
"misc_testsuite/issue6562.wast",
"misc_testsuite/simd/almost-extmul.wast",
"misc_testsuite/simd/canonicalize-nan.wast",
"misc_testsuite/simd/cvt-from-uint.wast",
"misc_testsuite/simd/issue_3327_bnot_lowering.wast",
"spec_testsuite/simd_bit_shift.wast",
"spec_testsuite/simd_boolean.wast",
"spec_testsuite/simd_conversions.wast",
"spec_testsuite/simd_f32x4.wast",
"spec_testsuite/simd_f32x4_arith.wast",
"spec_testsuite/simd_f32x4_pmin_pmax.wast",
Expand Down Expand Up @@ -456,7 +452,6 @@ impl WastTest {
"spec_testsuite/simd_i8x16_arith.wast",
"spec_testsuite/simd_i8x16_arith2.wast",
"spec_testsuite/simd_i8x16_sat_arith.wast",
"spec_testsuite/simd_int_to_int_extend.wast",
"spec_testsuite/simd_lane.wast",
"spec_testsuite/simd_load.wast",
"spec_testsuite/simd_load_zero.wast",
Expand All @@ -471,18 +466,23 @@ impl WastTest {
#[cfg(target_arch = "x86_64")]
if !(std::is_x86_feature_detected!("avx") && std::is_x86_feature_detected!("avx2")) {
let unsupported = [
"misc_testsuite/int-to-float-splat.wast",
"misc_testsuite/issue6562.wast",
"misc_testsuite/simd/cvt-from-uint.wast",
"misc_testsuite/simd/issue6725-no-egraph-panic.wast",
"misc_testsuite/simd/replace-lane-preserve.wast",
"misc_testsuite/simd/spillslot-size-fuzzbug.wast",
"misc_testsuite/winch/_simd_lane.wast",
"misc_testsuite/winch/_simd_splat.wast",
"spec_testsuite/simd_align.wast",
"spec_testsuite/simd_conversions.wast",
"spec_testsuite/simd_f32x4_cmp.wast",
"spec_testsuite/simd_f64x2_cmp.wast",
"spec_testsuite/simd_i16x8_cmp.wast",
"spec_testsuite/simd_i32x4_cmp.wast",
"spec_testsuite/simd_i64x2_cmp.wast",
"spec_testsuite/simd_i8x16_cmp.wast",
"spec_testsuite/simd_int_to_int_extend.wast",
"spec_testsuite/simd_load_extend.wast",
"spec_testsuite/simd_load_splat.wast",
"spec_testsuite/simd_store16_lane.wast",
Expand Down
35 changes: 35 additions & 0 deletions tests/disas/winch/x64/f32x4_convert_i32x4_s/const_avx.wat
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@@ -0,0 +1,35 @@
;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (result v128)
(f32x4.convert_i32x4_s (v128.const i32x4 0 1 2 3))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x3e
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movdqu 0xc(%rip), %xmm0
;; vcvtdq2ps %xmm0, %xmm0
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 3e: ud2
;; 40: addb %al, (%rax)
;; 42: addb %al, (%rax)
;; 44: addl %eax, (%rax)
;; 46: addb %al, (%rax)
;; 48: addb (%rax), %al
;; 4a: addb %al, (%rax)
;; 4c: addl (%rax), %eax
;; 4e: addb %al, (%rax)
49 changes: 49 additions & 0 deletions tests/disas/winch/x64/f32x4_convert_i32x4_u/const_avx.wat
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@@ -0,0 +1,49 @@
;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (result v128)
(f32x4.convert_i32x4_u (v128.const i32x4 0 1 2 3))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x60
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movdqu 0x3c(%rip), %xmm0
;; vpslld $0x10, %xmm0, %xmm15
;; vpsrld $0x10, %xmm15, %xmm15
;; vpsubd %xmm15, %xmm0, %xmm0
;; vcvtdq2ps %xmm15, %xmm15
;; vpsrld $1, %xmm0, %xmm0
;; vcvtdq2ps %xmm0, %xmm0
;; vaddps %xmm0, %xmm0, %xmm0
;; vaddps %xmm0, %xmm15, %xmm0
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 60: ud2
;; 62: addb %al, (%rax)
;; 64: addb %al, (%rax)
;; 66: addb %al, (%rax)
;; 68: addb %al, (%rax)
;; 6a: addb %al, (%rax)
;; 6c: addb %al, (%rax)
;; 6e: addb %al, (%rax)
;; 70: addb %al, (%rax)
;; 72: addb %al, (%rax)
;; 74: addl %eax, (%rax)
;; 76: addb %al, (%rax)
;; 78: addb (%rax), %al
;; 7a: addb %al, (%rax)
;; 7c: addl (%rax), %eax
;; 7e: addb %al, (%rax)
34 changes: 34 additions & 0 deletions tests/disas/winch/x64/f32x4_demote_f64x2_zero/const_avx.wat
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@@ -0,0 +1,34 @@
;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (result v128)
(f32x4.demote_f64x2_zero (v128.const f64x2 0 1))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x3e
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movdqu 0xc(%rip), %xmm0
;; vcvtpd2ps %xmm0, %xmm0
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 3e: ud2
;; 40: addb %al, (%rax)
;; 42: addb %al, (%rax)
;; 44: addb %al, (%rax)
;; 46: addb %al, (%rax)
;; 48: addb %al, (%rax)
;; 4a: addb %al, (%rax)
;; 4c: addb %al, (%rax)
35 changes: 35 additions & 0 deletions tests/disas/winch/x64/f64x2_convert_low_i32x4_s/const_avx.wat
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@@ -0,0 +1,35 @@
;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (result v128)
(f64x2.convert_low_i32x4_s (v128.const i64x2 1 0))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x3e
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movdqu 0xc(%rip), %xmm0
;; vcvtdq2pd %xmm0, %xmm0
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 3e: ud2
;; 40: addl %eax, (%rax)
;; 42: addb %al, (%rax)
;; 44: addb %al, (%rax)
;; 46: addb %al, (%rax)
;; 48: addb %al, (%rax)
;; 4a: addb %al, (%rax)
;; 4c: addb %al, (%rax)
;; 4e: addb %al, (%rax)
52 changes: 52 additions & 0 deletions tests/disas/winch/x64/f64x2_convert_low_i32x4_u/const_avx.wat
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;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (result v128)
(f64x2.convert_low_i32x4_u (v128.const i64x2 1 0))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x4a
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movdqu 0x1c(%rip), %xmm0
;; vunpcklps 0x24(%rip), %xmm0, %xmm0
;; vsubpd 0x2c(%rip), %xmm0, %xmm0
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 4a: ud2
;; 4c: addb %al, (%rax)
;; 4e: addb %al, (%rax)
;; 50: addl %eax, (%rax)
;; 52: addb %al, (%rax)
;; 54: addb %al, (%rax)
;; 56: addb %al, (%rax)
;; 58: addb %al, (%rax)
;; 5a: addb %al, (%rax)
;; 5c: addb %al, (%rax)
;; 5e: addb %al, (%rax)
;; 60: addb %al, (%rax)
;; 62: xorb %al, (%rbx)
;; 65: addb %dh, (%rax)
;; 67: addb %al, (%r8)
;; 6a: addb %al, (%rax)
;; 6c: addb %al, (%rax)
;; 6e: addb %al, (%rax)
;; 70: addb %al, (%rax)
;; 72: addb %al, (%rax)
;; 74: addb %al, (%rax)
;; 76: xorb %al, (%rbx)
;; 79: addb %al, (%rax)
;; 7b: addb %al, (%rax)
;; 7d: addb %dh, (%rax)
35 changes: 35 additions & 0 deletions tests/disas/winch/x64/f64x2_promote_low_f32x4/const_avx.wat
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;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (result v128)
(f64x2.promote_low_f32x4 (v128.const i32x4 1 2 3 4))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x3e
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movdqu 0xc(%rip), %xmm0
;; vcvtps2pd %xmm0, %xmm0
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 3e: ud2
;; 40: addl %eax, (%rax)
;; 42: addb %al, (%rax)
;; 44: addb (%rax), %al
;; 46: addb %al, (%rax)
;; 48: addl (%rax), %eax
;; 4a: addb %al, (%rax)
;; 4c: addb $0, %al
;; 4e: addb %al, (%rax)
37 changes: 37 additions & 0 deletions tests/disas/winch/x64/i16x8_extend_high_i8x16_s/const_avx.wat
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;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (result v128)
(i16x8.extend_high_i8x16_s (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x45
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movdqu 0x1c(%rip), %xmm0
;; vpalignr $8, %xmm0, %xmm0, %xmm0
;; vpmovsxbw %xmm0, %xmm0
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 45: ud2
;; 47: addb %al, (%rax)
;; 49: addb %al, (%rax)
;; 4b: addb %al, (%rax)
;; 4d: addb %al, (%rax)
;; 4f: addb %al, (%rax)
;; 51: addl %eax, (%rdx)
;; 53: addl 0x9080706(, %rax), %eax
;; 5a: orb (%rbx), %cl
;; 5c: orb $0xd, %al
36 changes: 36 additions & 0 deletions tests/disas/winch/x64/i16x8_extend_high_i8x16_u/const_avx.wat
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;;! target = "x86_64"
;;! test = "winch"
;;! flags = [ "-Ccranelift-has-avx" ]

(module
(func (result v128)
(i16x8.extend_high_i8x16_u (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15))
)
)
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x44
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movdqu 0x1c(%rip), %xmm0
;; vpxor %xmm15, %xmm15, %xmm15
;; vpunpckhbw %xmm15, %xmm0, %xmm0
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 44: ud2
;; 46: addb %al, (%rax)
;; 48: addb %al, (%rax)
;; 4a: addb %al, (%rax)
;; 4c: addb %al, (%rax)
;; 4e: addb %al, (%rax)
;; 50: addb %al, (%rcx)
;; 52: addb (%rbx), %al
;; 54: addb $5, %al
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