Merge pull request #3639 from bjorn3/machinst_cleanups

Various cleanups around machinst

cranelift/codegen/src/binemit/memorysink.rs

@@ -55,12 +55,7 @@ impl<'a> MemoryCodeSink<'a> {
         Self {
             data,
             offset: 0,
-            info: CodeInfo {
-                code_size: 0,
-                jumptables_size: 0,
-                rodata_size: 0,
-                total_size: 0,
-            },
+            info: CodeInfo { total_size: 0 },
             relocs,
             traps,
         }
@@ -140,16 +135,7 @@ impl<'a> CodeSink for MemoryCodeSink<'a> {
         self.traps.trap(ofs, srcloc, code);
     }
 
-    fn begin_jumptables(&mut self) {
-        self.info.code_size = self.offset();
-    }
-
-    fn begin_rodata(&mut self) {
-        self.info.jumptables_size = self.offset() - self.info.code_size;
-    }
-
     fn end_codegen(&mut self) {
-        self.info.rodata_size = self.offset() - (self.info.jumptables_size + self.info.code_size);
         self.info.total_size = self.offset();
     }
 

cranelift/codegen/src/binemit/mod.rs

@@ -96,31 +96,10 @@ impl fmt::Display for Reloc {
 /// precedes the boundary between the sections.
 #[derive(PartialEq)]
 pub struct CodeInfo {
-    /// Number of bytes of machine code (the code starts at offset 0).
-    pub code_size: CodeOffset,
-
-    /// Number of bytes of jumptables.
-    pub jumptables_size: CodeOffset,
-
-    /// Number of bytes of rodata.
-    pub rodata_size: CodeOffset,
-
     /// Number of bytes in total.
     pub total_size: CodeOffset,
 }
 
-impl CodeInfo {
-    /// Offset of any relocatable jump tables, or equal to rodata if there are no jump tables.
-    pub fn jumptables(&self) -> CodeOffset {
-        self.code_size
-    }
-
-    /// Offset of any copyable read-only data, or equal to total_size if there are no rodata.
-    pub fn rodata(&self) -> CodeOffset {
-        self.code_size + self.jumptables_size
-    }
-}
-
 /// Abstract interface for adding bytes to the code segment.
 ///
 /// A `CodeSink` will receive all of the machine code for a function. It also accepts relocations
@@ -147,12 +126,6 @@ pub trait CodeSink {
     /// Add trap information for the current offset.
     fn trap(&mut self, _: TrapCode, _: SourceLoc);
 
-    /// Machine code output is complete, jump table data may follow.
-    fn begin_jumptables(&mut self);
-
-    /// Jump table output is complete, raw read-only data may follow.
-    fn begin_rodata(&mut self);
-
     /// Read-only data output is complete, we're done.
     fn end_codegen(&mut self);
 

cranelift/codegen/src/context.rs

@@ -114,15 +114,15 @@ impl Context {
         relocs: &mut dyn RelocSink,
         traps: &mut dyn TrapSink,
         stack_maps: &mut dyn StackMapSink,
-    ) -> CodegenResult<CodeInfo> {
+    ) -> CodegenResult<()> {
         let info = self.compile(isa)?;
         let old_len = mem.len();
         mem.resize(old_len + info.total_size as usize, 0);
         let new_info = unsafe {
             self.emit_to_memory(mem.as_mut_ptr().add(old_len), relocs, traps, stack_maps)
         };
         debug_assert!(new_info == info);
-        Ok(info)
+        Ok(())
     }
 
     /// Compile the function.
@@ -167,8 +167,7 @@ impl Context {
 
         self.remove_constant_phis(isa)?;
 
-        // FIXME: make this non optional
-        let backend = isa.get_mach_backend().expect("only mach backends nowadays");
+        let backend = isa.get_mach_backend();
         let result = backend.compile_function(&self.func, self.want_disasm)?;
         let info = result.code_info();
         self.mach_compile_result = Some(result);
@@ -243,12 +242,10 @@ impl Context {
         &self,
         isa: &dyn TargetIsa,
     ) -> CodegenResult<Option<crate::isa::unwind::UnwindInfo>> {
-        if let Some(backend) = isa.get_mach_backend() {
-            let unwind_info_kind = isa.unwind_info_kind();
-            let result = self.mach_compile_result.as_ref().unwrap();
-            return backend.emit_unwind_info(result, unwind_info_kind);
-        }
-        isa.create_unwind_info(&self.func)
+        let backend = isa.get_mach_backend();
+        let unwind_info_kind = isa.unwind_info_kind();
+        let result = self.mach_compile_result.as_ref().unwrap();
+        backend.emit_unwind_info(result, unwind_info_kind)
     }
 
     /// Run the verifier on the function.

cranelift/codegen/src/isa/aarch64/inst/emit.rs

@@ -669,12 +669,6 @@ impl EmitInfo {
     }
 }
 
-impl MachInstEmitInfo for EmitInfo {
-    fn flags(&self) -> &settings::Flags {
-        &self.0
-    }
-}
-
 impl MachInstEmit for Inst {
     type State = EmitState;
     type Info = EmitInfo;
@@ -2699,7 +2693,7 @@ impl MachInstEmit for Inst {
                 inst.emit(sink, emit_info, state);
                 let srcloc = state.cur_srcloc();
                 sink.add_reloc(srcloc, Reloc::Abs8, name, offset);
-                if emit_info.flags().emit_all_ones_funcaddrs() {
+                if emit_info.0.emit_all_ones_funcaddrs() {
                     sink.put8(u64::max_value());
                 } else {
                     sink.put8(0);

cranelift/codegen/src/isa/aarch64/mod.rs

@@ -98,8 +98,8 @@ impl MachBackend for AArch64Backend {
         "aarch64"
     }
 
-    fn triple(&self) -> Triple {
-        self.triple.clone()
+    fn triple(&self) -> &Triple {
+        &self.triple
     }
 
     fn flags(&self) -> &shared_settings::Flags {

cranelift/codegen/src/isa/arm32/inst/emit.rs

@@ -276,12 +276,6 @@ impl EmitInfo {
     }
 }
 
-impl MachInstEmitInfo for EmitInfo {
-    fn flags(&self) -> &settings::Flags {
-        &self.flags
-    }
-}
-
 impl MachInstEmit for Inst {
     type Info = EmitInfo;
     type State = EmitState;

cranelift/codegen/src/isa/arm32/mod.rs

@@ -88,8 +88,8 @@ impl MachBackend for Arm32Backend {
         "arm32"
     }
 
-    fn triple(&self) -> Triple {
-        self.triple.clone()
+    fn triple(&self) -> &Triple {
+        &self.triple
     }
 
     fn flags(&self) -> &settings::Flags {

cranelift/codegen/src/isa/mod.rs

@@ -50,7 +50,6 @@ use crate::ir;
 #[cfg(feature = "unwind")]
 use crate::isa::unwind::systemv::RegisterMappingError;
 use crate::machinst::{MachBackend, UnwindInfoKind};
-use crate::result::CodegenResult;
 use crate::settings;
 use crate::settings::SetResult;
 use alloc::{boxed::Box, vec::Vec};
@@ -237,18 +236,6 @@ pub trait TargetIsa: fmt::Display + Send + Sync {
     /// IntCC condition for Unsigned Addition Overflow (Carry).
     fn unsigned_add_overflow_condition(&self) -> ir::condcodes::IntCC;
 
-    /// Creates unwind information for the function.
-    ///
-    /// Returns `None` if there is no unwind information for the function.
-    #[cfg(feature = "unwind")]
-    fn create_unwind_info(
-        &self,
-        _func: &ir::Function,
-    ) -> CodegenResult<Option<unwind::UnwindInfo>> {
-        // By default, an ISA has no unwind information
-        Ok(None)
-    }
-
     /// Creates a new System V Common Information Entry for the ISA.
     ///
     /// Returns `None` if the ISA does not support System V unwind information.
@@ -258,10 +245,8 @@ pub trait TargetIsa: fmt::Display + Send + Sync {
         None
     }
 
-    /// Get the new-style MachBackend, if this is an adapter around one.
-    fn get_mach_backend(&self) -> Option<&dyn MachBackend> {
-        None
-    }
+    /// Get the new-style MachBackend.
+    fn get_mach_backend(&self) -> &dyn MachBackend;
 }
 
 /// Methods implemented for free for target ISA!

cranelift/codegen/src/isa/s390x/inst/emit.rs

@@ -916,12 +916,6 @@ impl EmitInfo {
     }
 }
 
-impl MachInstEmitInfo for EmitInfo {
-    fn flags(&self) -> &settings::Flags {
-        &self.flags
-    }
-}
-
 impl MachInstEmit for Inst {
     type State = EmitState;
     type Info = EmitInfo;
@@ -1703,7 +1697,7 @@ impl MachInstEmit for Inst {
                 let reg = writable_spilltmp_reg().to_reg();
                 put(sink, &enc_ri_b(opcode, reg, 12));
                 sink.add_reloc(srcloc, Reloc::Abs8, name, offset);
-                if emit_info.flags().emit_all_ones_funcaddrs() {
+                if emit_info.flags.emit_all_ones_funcaddrs() {
                     sink.put8(u64::max_value());
                 } else {
                     sink.put8(0);

cranelift/codegen/src/isa/s390x/mod.rs

@@ -101,8 +101,8 @@ impl MachBackend for S390xBackend {
         "s390x"
     }
 
-    fn triple(&self) -> Triple {
-        self.triple.clone()
+    fn triple(&self) -> &Triple {
+        &self.triple
     }
 
     fn flags(&self) -> &shared_settings::Flags {

cranelift/codegen/src/isa/test_utils.rs

@@ -68,10 +68,6 @@ impl CodeSink for TestCodeSink {
 
     fn trap(&mut self, _code: TrapCode, _srcloc: SourceLoc) {}
 
-    fn begin_jumptables(&mut self) {}
-
-    fn begin_rodata(&mut self) {}
-
     fn end_codegen(&mut self) {}
 
     fn add_call_site(&mut self, _opcode: Opcode, _srcloc: SourceLoc) {}

cranelift/codegen/src/isa/x64/encoding/rex.rs

@@ -14,7 +14,7 @@ use crate::{
         args::{Amode, OperandSize},
         regs, EmitInfo, EmitState, Inst, LabelUse,
     },
-    machinst::{MachBuffer, MachInstEmitInfo},
+    machinst::MachBuffer,
 };
 use regalloc::{Reg, RegClass};
 
@@ -299,7 +299,7 @@ pub(crate) fn emit_std_enc_mem(
         Amode::ImmReg { simm32, base, .. } => {
             // If this is an access based off of RSP, it may trap with a stack overflow if it's the
             // first touch of a new stack page.
-            if *base == regs::rsp() && !can_trap && info.flags().enable_probestack() {
+            if *base == regs::rsp() && !can_trap && info.flags.enable_probestack() {
                 sink.add_trap(srcloc, TrapCode::StackOverflow);
             }
 
@@ -365,7 +365,7 @@ pub(crate) fn emit_std_enc_mem(
         } => {
             // If this is an access based off of RSP, it may trap with a stack overflow if it's the
             // first touch of a new stack page.
-            if *reg_base == regs::rsp() && !can_trap && info.flags().enable_probestack() {
+            if *reg_base == regs::rsp() && !can_trap && info.flags.enable_probestack() {
                 sink.add_trap(srcloc, TrapCode::StackOverflow);
             }
 

cranelift/codegen/src/isa/x64/inst/emit.rs

@@ -1088,7 +1088,7 @@ pub(crate) fn emit(
         }
 
         Inst::Push64 { src } => {
-            if info.flags().enable_probestack() {
+            if info.flags.enable_probestack() {
                 sink.add_trap(state.cur_srcloc(), TrapCode::StackOverflow);
             }
 
@@ -1139,7 +1139,7 @@ pub(crate) fn emit(
         }
 
         Inst::CallKnown { dest, opcode, .. } => {
-            if info.flags().enable_probestack() {
+            if info.flags.enable_probestack() {
                 sink.add_trap(state.cur_srcloc(), TrapCode::StackOverflow);
             }
             if let Some(s) = state.take_stack_map() {
@@ -1157,7 +1157,7 @@ pub(crate) fn emit(
         }
 
         Inst::CallUnknown { dest, opcode, .. } => {
-            if info.flags().enable_probestack() {
+            if info.flags.enable_probestack() {
                 sink.add_trap(state.cur_srcloc(), TrapCode::StackOverflow);
             }
             let start_offset = sink.cur_offset();
@@ -2412,7 +2412,7 @@ pub(crate) fn emit(
         }
 
         Inst::LoadExtName { dst, name, offset } => {
-            if info.flags().is_pic() {
+            if info.flags.is_pic() {
                 // Generates: movq symbol@GOTPCREL(%rip), %dst
                 let enc_dst = int_reg_enc(dst.to_reg());
                 sink.put1(0x48 | ((enc_dst >> 3) & 1) << 2);
@@ -2442,7 +2442,7 @@ pub(crate) fn emit(
                 sink.put1(0x48 | ((enc_dst >> 3) & 1));
                 sink.put1(0xB8 | (enc_dst & 7));
                 emit_reloc(sink, state, Reloc::Abs8, name, *offset);
-                if info.flags().emit_all_ones_funcaddrs() {
+                if info.flags.emit_all_ones_funcaddrs() {
                     sink.put8(u64::max_value());
                 } else {
                     sink.put8(0);

cranelift/codegen/src/isa/x64/inst/mod.rs

@@ -3298,7 +3298,7 @@ pub struct EmitState {
 
 /// Constant state used during emissions of a sequence of instructions.
 pub struct EmitInfo {
-    flags: settings::Flags,
+    pub(super) flags: settings::Flags,
     isa_flags: x64_settings::Flags,
 }
 
@@ -3308,12 +3308,6 @@ impl EmitInfo {
     }
 }
 
-impl MachInstEmitInfo for EmitInfo {
-    fn flags(&self) -> &Flags {
-        &self.flags
-    }
-}
-
 impl MachInstEmit for Inst {
     type State = EmitState;
     type Info = EmitInfo;

cranelift/codegen/src/isa/x64/mod.rs

@@ -98,8 +98,8 @@ impl MachBackend for X64Backend {
         "x64"
     }
 
-    fn triple(&self) -> Triple {
-        self.triple.clone()
+    fn triple(&self) -> &Triple {
+        &self.triple
     }
 
     fn reg_universe(&self) -> &RealRegUniverse {