Support IBM z/Architecture

This adds support for the IBM z/Architecture (s390x-ibm-linux).

The status of the s390x backend in its current form is:
- Wasmtime is fully functional and passes all tests on s390x.
- All back-end features supported, with the exception of SIMD.
- There is still a lot of potential for performance improvements.
- Currently the only supported processor type is z15.

build.rs

@@ -219,6 +219,9 @@ fn ignore(testsuite: &str, testname: &str, strategy: &str) -> bool {
             _ => (),
         },
         "Cranelift" => match (testsuite, testname) {
+            // No simd support yet for s390x.
+            ("simd", _) if platform_is_s390x() => return true,
+
             ("simd", _) if cfg!(feature = "old-x86-backend") => return true, // skip all SIMD tests on old backend.
             // These are new instructions that are not really implemented in any backend.
             ("simd", "simd_i8x16_arith2")
@@ -243,3 +246,7 @@ fn ignore(testsuite: &str, testname: &str, strategy: &str) -> bool {
 fn platform_is_x64() -> bool {
     env::var("CARGO_CFG_TARGET_ARCH").unwrap() == "x86_64"
 }
+
+fn platform_is_s390x() -> bool {
+    env::var("CARGO_CFG_TARGET_ARCH").unwrap() == "s390x"
+}

cranelift/codegen/Cargo.toml

@@ -62,6 +62,7 @@ unwind = ["gimli"]
 x86 = []
 arm64 = []
 riscv = []
+s390x = []
 arm32 = [] # Work-in-progress codegen backend for ARM.
 
 # Stub feature that does nothing, for Cargo-features compatibility: the new
@@ -75,7 +76,8 @@ old-x86-backend = []
 all-arch = [
     "x86",
     "arm64",
-    "riscv"
+    "riscv",
+    "s390x"
 ]
 
 # For dependent crates that want to serialize some parts of cranelift

cranelift/codegen/meta/src/isa/mod.rs

@@ -6,6 +6,7 @@ use std::fmt;
 mod arm32;
 mod arm64;
 mod riscv;
+mod s390x;
 pub(crate) mod x86;
 
 /// Represents known ISA target.
@@ -15,6 +16,7 @@ pub enum Isa {
     X86,
     Arm32,
     Arm64,
+    S390x,
 }
 
 impl Isa {
@@ -31,6 +33,7 @@ impl Isa {
         match arch {
             "riscv" => Some(Isa::Riscv),
             "aarch64" => Some(Isa::Arm64),
+            "s390x" => Some(Isa::S390x),
             x if ["x86_64", "i386", "i586", "i686"].contains(&x) => Some(Isa::X86),
             x if x.starts_with("arm") || arch.starts_with("thumb") => Some(Isa::Arm32),
             _ => None,
@@ -39,7 +42,7 @@ impl Isa {
 
     /// Returns all supported isa targets.
     pub fn all() -> &'static [Isa] {
-        &[Isa::Riscv, Isa::X86, Isa::Arm32, Isa::Arm64]
+        &[Isa::Riscv, Isa::X86, Isa::Arm32, Isa::Arm64, Isa::S390x]
     }
 }
 
@@ -51,6 +54,7 @@ impl fmt::Display for Isa {
             Isa::X86 => write!(f, "x86"),
             Isa::Arm32 => write!(f, "arm32"),
             Isa::Arm64 => write!(f, "arm64"),
+            Isa::S390x => write!(f, "s390x"),
         }
     }
 }
@@ -62,6 +66,7 @@ pub(crate) fn define(isas: &[Isa], shared_defs: &mut SharedDefinitions) -> Vec<T
             Isa::X86 => x86::define(shared_defs),
             Isa::Arm32 => arm32::define(shared_defs),
             Isa::Arm64 => arm64::define(shared_defs),
+            Isa::S390x => s390x::define(shared_defs),
         })
         .collect()
 }

cranelift/codegen/meta/src/isa/s390x/mod.rs

@@ -0,0 +1,31 @@
+use crate::cdsl::cpu_modes::CpuMode;
+use crate::cdsl::instructions::{InstructionGroupBuilder, InstructionPredicateMap};
+use crate::cdsl::isa::TargetIsa;
+use crate::cdsl::recipes::Recipes;
+use crate::cdsl::regs::IsaRegsBuilder;
+use crate::cdsl::settings::SettingGroupBuilder;
+
+use crate::shared::Definitions as SharedDefinitions;
+
+pub(crate) fn define(shared_defs: &mut SharedDefinitions) -> TargetIsa {
+    let inst_group = InstructionGroupBuilder::new(&mut shared_defs.all_instructions).build();
+    let settings = SettingGroupBuilder::new("s390x").build();
+    let regs = IsaRegsBuilder::new().build();
+    let recipes = Recipes::new();
+    let encodings_predicates = InstructionPredicateMap::new();
+
+    let mut mode = CpuMode::new("s390x");
+    let expand = shared_defs.transform_groups.by_name("expand");
+    mode.legalize_default(expand);
+    let cpu_modes = vec![mode];
+
+    TargetIsa::new(
+        "s390x",
+        inst_group,
+        settings,
+        regs,
+        recipes,
+        cpu_modes,
+        encodings_predicates,
+    )
+}

cranelift/codegen/meta/src/lib.rs

@@ -116,6 +116,9 @@ pub fn generate(
             isa::Isa::Arm64 => {
                 // aarch64 doesn't have platform-specific settings.
             }
+            isa::Isa::S390x => {
+                // s390x doesn't have platform-specific settings.
+            }
             isa::Isa::Arm32 | isa::Isa::Riscv => todo!(),
         }
     }

cranelift/codegen/src/isa/mod.rs

@@ -91,6 +91,9 @@ mod arm32;
 #[cfg(feature = "arm64")]
 pub(crate) mod aarch64;
 
+#[cfg(feature = "s390x")]
+mod s390x;
+
 pub mod unwind;
 
 mod call_conv;
@@ -160,6 +163,7 @@ pub fn lookup_variant(triple: Triple, variant: BackendVariant) -> Result<Builder
         }
         (Architecture::Arm { .. }, _) => isa_builder!(arm32, (feature = "arm32"), triple),
         (Architecture::Aarch64 { .. }, _) => isa_builder!(aarch64, (feature = "arm64"), triple),
+        (Architecture::S390x { .. }, _) => isa_builder!(s390x, (feature = "s390x"), triple),
         _ => Err(LookupError::Unsupported),
     }
 }