Refactor AArch64 ABI support to extract common bits for shared impl w…

…ith x64.

We have observed that the ABI implementations for AArch64 and x64 are
very similar; in fact, x64's implementation started as a modified copy
of AArch64's implementation. This is an artifact of both a similar ABI
(both machines pass args and return values in registers first, then the
stack, and both machines give considerable freedom with stack-frame
layout) and a too-low-level ABI abstraction in the existing design. For
machines that fit the mainstream or most common ABI-design idioms, we
should be able to do much better.

This commit factors AArch64 into machine-specific and
machine-independent parts, but does not yet modify x64; that will come
next.

This should be completely neutral with respect to compile time and
generated code performance.

cranelift/codegen/src/isa/aarch64/inst/args.rs

@@ -7,8 +7,7 @@ use crate::ir;
 use crate::ir::types::{F32X2, F32X4, F64X2, I16X4, I16X8, I32X2, I32X4, I64X2, I8X16, I8X8};
 use crate::ir::Type;
 use crate::isa::aarch64::inst::*;
-use crate::isa::aarch64::lower::ty_bits;
-use crate::machinst::MachLabel;
+use crate::machinst::{ty_bits, MachLabel};
 
 use regalloc::{RealRegUniverse, Reg, Writable};
 

cranelift/codegen/src/isa/aarch64/inst/emit.rs

@@ -5,7 +5,7 @@ use crate::ir::constant::ConstantData;
 use crate::ir::types::*;
 use crate::ir::TrapCode;
 use crate::isa::aarch64::inst::*;
-use crate::isa::aarch64::lower::ty_bits;
+use crate::machinst::ty_bits;
 
 use regalloc::{Reg, RegClass, Writable};
 

cranelift/codegen/src/isa/aarch64/inst/mod.rs

@@ -1215,6 +1215,80 @@ impl Inst {
             const_data: value,
         }
     }
+
+    /// Generic constructor for a load (zero-extending where appropriate).
+    pub fn gen_load(into_reg: Writable<Reg>, mem: MemArg, ty: Type) -> Inst {
+        match ty {
+            B1 | B8 | I8 => Inst::ULoad8 {
+                rd: into_reg,
+                mem,
+                srcloc: None,
+            },
+            B16 | I16 => Inst::ULoad16 {
+                rd: into_reg,
+                mem,
+                srcloc: None,
+            },
+            B32 | I32 | R32 => Inst::ULoad32 {
+                rd: into_reg,
+                mem,
+                srcloc: None,
+            },
+            B64 | I64 | R64 => Inst::ULoad64 {
+                rd: into_reg,
+                mem,
+                srcloc: None,
+            },
+            F32 => Inst::FpuLoad32 {
+                rd: into_reg,
+                mem,
+                srcloc: None,
+            },
+            F64 => Inst::FpuLoad64 {
+                rd: into_reg,
+                mem,
+                srcloc: None,
+            },
+            _ => unimplemented!("gen_load({})", ty),
+        }
+    }
+
+    /// Generic constructor for a store.
+    pub fn gen_store(mem: MemArg, from_reg: Reg, ty: Type) -> Inst {
+        match ty {
+            B1 | B8 | I8 => Inst::Store8 {
+                rd: from_reg,
+                mem,
+                srcloc: None,
+            },
+            B16 | I16 => Inst::Store16 {
+                rd: from_reg,
+                mem,
+                srcloc: None,
+            },
+            B32 | I32 | R32 => Inst::Store32 {
+                rd: from_reg,
+                mem,
+                srcloc: None,
+            },
+            B64 | I64 | R64 => Inst::Store64 {
+                rd: from_reg,
+                mem,
+                srcloc: None,
+            },
+            F32 => Inst::FpuStore32 {
+                rd: from_reg,
+                mem,
+                srcloc: None,
+            },
+            F64 => Inst::FpuStore64 {
+                rd: from_reg,
+                mem,
+                srcloc: None,
+            },
+            _ => unimplemented!("gen_store({})", ty),
+        }
+    }
 }
 
 //=============================================================================

cranelift/codegen/src/isa/aarch64/lower.rs

@@ -994,37 +994,6 @@ pub(crate) fn condcode_is_signed(cc: IntCC) -> bool {
 //=============================================================================
 // Helpers for instruction lowering.
 
-/// Returns the size (in bits) of a given type.
-pub fn ty_bits(ty: Type) -> usize {
-    match ty {
-        B1 => 1,
-        B8 | I8 => 8,
-        B16 | I16 => 16,
-        B32 | I32 | F32 | R32 => 32,
-        B64 | I64 | F64 | R64 => 64,
-        B128 | I128 => 128,
-        IFLAGS | FFLAGS => 32,
-        B8X8 | I8X8 | B16X4 | I16X4 | B32X2 | I32X2 => 64,
-        B8X16 | I8X16 | B16X8 | I16X8 | B32X4 | I32X4 | B64X2 | I64X2 => 128,
-        F32X4 | F64X2 => 128,
-        _ => panic!("ty_bits() on unknown type: {:?}", ty),
-    }
-}
-
-pub(crate) fn ty_is_int(ty: Type) -> bool {
-    match ty {
-        B1 | B8 | I8 | B16 | I16 | B32 | I32 | B64 | I64 | R32 | R64 => true,
-        F32 | F64 | B128 | F32X2 | F32X4 | F64X2 | I128 | I8X8 | I8X16 | I16X4 | I16X8 | I32X2
-        | I32X4 | I64X2 => false,
-        IFLAGS | FFLAGS => panic!("Unexpected flags type"),
-        _ => panic!("ty_is_int() on unknown type: {:?}", ty),
-    }
-}
-
-pub(crate) fn ty_is_float(ty: Type) -> bool {
-    !ty_is_int(ty)
-}
-
 pub(crate) fn choose_32_64<T: Copy>(ty: Type, op32: T, op64: T) -> T {
     let bits = ty_bits(ty);
     if bits <= 32 {